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@@ -1859,25 +1859,17 @@ static void et131x_config_rx_dma_regs(struct et131x_adapter *adapter)
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/* Halt RXDMA to perform the reconfigure. */
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et131x_rx_dma_disable(adapter);
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- /* Load the completion writeback physical address
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- *
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- * NOTE : dma_alloc_coherent(), used above to alloc DMA regions,
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- * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses
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- * are ever returned, make sure the high part is retrieved here
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- * before storing the adjusted address.
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- */
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- writel((u32) ((u64)rx_local->rx_status_bus >> 32),
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- &rx_dma->dma_wb_base_hi);
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- writel((u32) rx_local->rx_status_bus, &rx_dma->dma_wb_base_lo);
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+ /* Load the completion writeback physical address */
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+ writel(upper_32_bits(rx_local->rx_status_bus), &rx_dma->dma_wb_base_hi);
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+ writel(lower_32_bits(rx_local->rx_status_bus), &rx_dma->dma_wb_base_lo);
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memset(rx_local->rx_status_block, 0, sizeof(struct rx_status_block));
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/* Set the address and parameters of the packet status ring into the
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* 1310's registers
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*/
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- writel((u32) ((u64)rx_local->ps_ring_physaddr >> 32),
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- &rx_dma->psr_base_hi);
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- writel((u32) rx_local->ps_ring_physaddr, &rx_dma->psr_base_lo);
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+ writel(upper_32_bits(rx_local->ps_ring_physaddr), &rx_dma->psr_base_hi);
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+ writel(lower_32_bits(rx_local->ps_ring_physaddr), &rx_dma->psr_base_lo);
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writel(rx_local->psr_num_entries - 1, &rx_dma->psr_num_des);
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writel(0, &rx_dma->psr_full_offset);
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@@ -1902,9 +1894,10 @@ static void et131x_config_rx_dma_regs(struct et131x_adapter *adapter)
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/* Set the address and parameters of Free buffer ring 1 (and 0 if
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* required) into the 1310's registers
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*/
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- writel((u32) (rx_local->fbr[0]->ring_physaddr >> 32),
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+ writel(upper_32_bits(rx_local->fbr[0]->ring_physaddr),
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&rx_dma->fbr1_base_hi);
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- writel((u32) rx_local->fbr[0]->ring_physaddr, &rx_dma->fbr1_base_lo);
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+ writel(lower_32_bits(rx_local->fbr[0]->ring_physaddr),
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+ &rx_dma->fbr1_base_lo);
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writel(rx_local->fbr[0]->num_entries - 1, &rx_dma->fbr1_num_des);
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writel(ET_DMA10_WRAP, &rx_dma->fbr1_full_offset);
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@@ -1926,9 +1919,10 @@ static void et131x_config_rx_dma_regs(struct et131x_adapter *adapter)
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fbr_entry++;
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}
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- writel((u32) (rx_local->fbr[1]->ring_physaddr >> 32),
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+ writel(upper_32_bits(rx_local->fbr[1]->ring_physaddr),
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&rx_dma->fbr0_base_hi);
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- writel((u32) rx_local->fbr[1]->ring_physaddr, &rx_dma->fbr0_base_lo);
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+ writel(lower_32_bits(rx_local->fbr[1]->ring_physaddr),
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+ &rx_dma->fbr0_base_lo);
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writel(rx_local->fbr[1]->num_entries - 1, &rx_dma->fbr0_num_des);
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writel(ET_DMA10_WRAP, &rx_dma->fbr0_full_offset);
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@@ -1970,18 +1964,19 @@ static void et131x_config_tx_dma_regs(struct et131x_adapter *adapter)
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struct txdma_regs __iomem *txdma = &adapter->regs->txdma;
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/* Load the hardware with the start of the transmit descriptor ring. */
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- writel((u32) ((u64)adapter->tx_ring.tx_desc_ring_pa >> 32),
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+ writel(upper_32_bits(adapter->tx_ring.tx_desc_ring_pa),
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&txdma->pr_base_hi);
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- writel((u32) adapter->tx_ring.tx_desc_ring_pa,
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+ writel(lower_32_bits(adapter->tx_ring.tx_desc_ring_pa),
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&txdma->pr_base_lo);
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/* Initialise the transmit DMA engine */
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writel(NUM_DESC_PER_RING_TX - 1, &txdma->pr_num_des);
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/* Load the completion writeback physical address */
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- writel((u32)((u64)adapter->tx_ring.tx_status_pa >> 32),
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- &txdma->dma_wb_base_hi);
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- writel((u32)adapter->tx_ring.tx_status_pa, &txdma->dma_wb_base_lo);
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+ writel(upper_32_bits(adapter->tx_ring.tx_status_pa),
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+ &txdma->dma_wb_base_hi);
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+ writel(lower_32_bits(adapter->tx_ring.tx_status_pa),
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+ &txdma->dma_wb_base_lo);
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*adapter->tx_ring.tx_status = 0;
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@@ -2460,16 +2455,16 @@ static int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
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* so the device can access it
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*/
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rx_ring->fbr[0]->bus_high[index] =
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- (u32) (fbr1_tmp_physaddr >> 32);
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+ upper_32_bits(fbr1_tmp_physaddr);
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rx_ring->fbr[0]->bus_low[index] =
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- (u32) fbr1_tmp_physaddr;
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+ lower_32_bits(fbr1_tmp_physaddr);
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fbr1_tmp_physaddr += rx_ring->fbr[0]->buffsize;
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rx_ring->fbr[0]->buffer1[index] =
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- rx_ring->fbr[0]->virt[index];
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+ rx_ring->fbr[0]->virt[index];
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rx_ring->fbr[0]->buffer2[index] =
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- rx_ring->fbr[0]->virt[index] - 4;
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+ rx_ring->fbr[0]->virt[index] - 4;
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}
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}
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@@ -2508,16 +2503,16 @@ static int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
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(j * rx_ring->fbr[1]->buffsize) + fbr0_offset;
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rx_ring->fbr[1]->bus_high[index] =
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- (u32) (fbr0_tmp_physaddr >> 32);
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+ upper_32_bits(fbr0_tmp_physaddr);
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rx_ring->fbr[1]->bus_low[index] =
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- (u32) fbr0_tmp_physaddr;
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+ lower_32_bits(fbr0_tmp_physaddr);
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fbr0_tmp_physaddr += rx_ring->fbr[1]->buffsize;
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rx_ring->fbr[1]->buffer1[index] =
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- rx_ring->fbr[1]->virt[index];
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+ rx_ring->fbr[1]->virt[index];
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rx_ring->fbr[1]->buffer2[index] =
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- rx_ring->fbr[1]->virt[index] - 4;
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+ rx_ring->fbr[1]->virt[index] - 4;
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}
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}
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#endif
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