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@@ -17,7 +17,7 @@
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/* ---- Include Files ---------------------------------------------------- */
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#include <mach/reg_umi.h>
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#include <mach/reg_nand.h>
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-#include <cfg_global.h>
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+#include <mach/cfg_global.h>
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/* ---- Constants and Types ---------------------------------------------- */
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#if (CFG_GLOBAL_CHIP_FAMILY == CFG_GLOBAL_CHIP_FAMILY_BCMRING)
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@@ -48,7 +48,7 @@ int nand_bcm_umi_bch_correct_page(uint8_t *datap, uint8_t *readEccData,
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/* Check in device is ready */
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static inline int nand_bcm_umi_dev_ready(void)
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{
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- return REG_UMI_NAND_RCSR & REG_UMI_NAND_RCSR_RDY;
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+ return readl(®_UMI_NAND_RCSR) & REG_UMI_NAND_RCSR_RDY;
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}
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/* Wait until device is ready */
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@@ -62,10 +62,11 @@ static inline void nand_bcm_umi_wait_till_ready(void)
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static inline void nand_bcm_umi_hamming_enable_hwecc(void)
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{
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/* disable and reset ECC, 512 byte page */
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- REG_UMI_NAND_ECC_CSR &= ~(REG_UMI_NAND_ECC_CSR_ECC_ENABLE |
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- REG_UMI_NAND_ECC_CSR_256BYTE);
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+ writel(readl(®_UMI_NAND_ECC_CSR) & ~(REG_UMI_NAND_ECC_CSR_ECC_ENABLE |
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+ REG_UMI_NAND_ECC_CSR_256BYTE), ®_UMI_NAND_ECC_CSR);
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/* enable ECC */
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- REG_UMI_NAND_ECC_CSR |= REG_UMI_NAND_ECC_CSR_ECC_ENABLE;
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+ writel(readl(®_UMI_NAND_ECC_CSR) | REG_UMI_NAND_ECC_CSR_ECC_ENABLE,
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+ ®_UMI_NAND_ECC_CSR);
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}
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#if NAND_ECC_BCH
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@@ -76,18 +77,18 @@ static inline void nand_bcm_umi_hamming_enable_hwecc(void)
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static inline void nand_bcm_umi_bch_enable_read_hwecc(void)
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{
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/* disable and reset ECC */
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- REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_RD_ECC_VALID;
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+ writel(REG_UMI_BCH_CTRL_STATUS_RD_ECC_VALID, ®_UMI_BCH_CTRL_STATUS);
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/* Turn on ECC */
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- REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_ECC_RD_EN;
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+ writel(REG_UMI_BCH_CTRL_STATUS_ECC_RD_EN, ®_UMI_BCH_CTRL_STATUS);
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}
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/* Enable BCH Write ECC */
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static inline void nand_bcm_umi_bch_enable_write_hwecc(void)
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{
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/* disable and reset ECC */
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- REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_WR_ECC_VALID;
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+ writel(REG_UMI_BCH_CTRL_STATUS_WR_ECC_VALID, ®_UMI_BCH_CTRL_STATUS);
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/* Turn on ECC */
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- REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_ECC_WR_EN;
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+ writel(REG_UMI_BCH_CTRL_STATUS_ECC_WR_EN, ®_UMI_BCH_CTRL_STATUS);
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}
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/* Config number of BCH ECC bytes */
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@@ -99,9 +100,9 @@ static inline void nand_bcm_umi_bch_config_ecc(uint8_t numEccBytes)
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uint32_t numBits = numEccBytes * 8;
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/* disable and reset ECC */
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- REG_UMI_BCH_CTRL_STATUS =
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- REG_UMI_BCH_CTRL_STATUS_WR_ECC_VALID |
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- REG_UMI_BCH_CTRL_STATUS_RD_ECC_VALID;
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+ writel(REG_UMI_BCH_CTRL_STATUS_WR_ECC_VALID |
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+ REG_UMI_BCH_CTRL_STATUS_RD_ECC_VALID,
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+ ®_UMI_BCH_CTRL_STATUS);
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/* Every correctible bit requires 13 ECC bits */
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tValue = (uint32_t) (numBits / ECC_BITS_PER_CORRECTABLE_BIT);
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@@ -113,23 +114,21 @@ static inline void nand_bcm_umi_bch_config_ecc(uint8_t numEccBytes)
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kValue = nValue - (tValue * ECC_BITS_PER_CORRECTABLE_BIT);
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/* Write the settings */
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- REG_UMI_BCH_N = nValue;
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- REG_UMI_BCH_T = tValue;
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- REG_UMI_BCH_K = kValue;
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+ writel(nValue, ®_UMI_BCH_N);
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+ writel(tValue, ®_UMI_BCH_T);
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+ writel(kValue, ®_UMI_BCH_K);
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}
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/* Pause during ECC read calculation to skip bytes in OOB */
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static inline void nand_bcm_umi_bch_pause_read_ecc_calc(void)
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{
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- REG_UMI_BCH_CTRL_STATUS =
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- REG_UMI_BCH_CTRL_STATUS_ECC_RD_EN |
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- REG_UMI_BCH_CTRL_STATUS_PAUSE_ECC_DEC;
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+ writel(REG_UMI_BCH_CTRL_STATUS_ECC_RD_EN | REG_UMI_BCH_CTRL_STATUS_PAUSE_ECC_DEC, ®_UMI_BCH_CTRL_STATUS);
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}
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/* Resume during ECC read calculation after skipping bytes in OOB */
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static inline void nand_bcm_umi_bch_resume_read_ecc_calc(void)
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{
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- REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_ECC_RD_EN;
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+ writel(REG_UMI_BCH_CTRL_STATUS_ECC_RD_EN, ®_UMI_BCH_CTRL_STATUS);
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}
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/* Poll read ECC calc to check when hardware completes */
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@@ -139,7 +138,7 @@ static inline uint32_t nand_bcm_umi_bch_poll_read_ecc_calc(void)
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do {
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/* wait for ECC to be valid */
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- regVal = REG_UMI_BCH_CTRL_STATUS;
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+ regVal = readl(®_UMI_BCH_CTRL_STATUS);
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} while ((regVal & REG_UMI_BCH_CTRL_STATUS_RD_ECC_VALID) == 0);
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return regVal;
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@@ -149,7 +148,7 @@ static inline uint32_t nand_bcm_umi_bch_poll_read_ecc_calc(void)
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static inline void nand_bcm_umi_bch_poll_write_ecc_calc(void)
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{
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/* wait for ECC to be valid */
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- while ((REG_UMI_BCH_CTRL_STATUS & REG_UMI_BCH_CTRL_STATUS_WR_ECC_VALID)
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+ while ((readl(®_UMI_BCH_CTRL_STATUS) & REG_UMI_BCH_CTRL_STATUS_WR_ECC_VALID)
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== 0)
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;
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}
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@@ -170,9 +169,9 @@ static inline void nand_bcm_umi_bch_read_oobEcc(uint32_t pageSize,
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if (pageSize != NAND_DATA_ACCESS_SIZE) {
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/* skip BI */
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#if defined(__KERNEL__) && !defined(STANDALONE)
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- *oobp++ = REG_NAND_DATA8;
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+ *oobp++ = readb(®_NAND_DATA8);
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#else
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- REG_NAND_DATA8;
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+ readb(®_NAND_DATA8);
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#endif
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numToRead--;
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}
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@@ -180,9 +179,9 @@ static inline void nand_bcm_umi_bch_read_oobEcc(uint32_t pageSize,
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while (numToRead > numEccBytes) {
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/* skip free oob region */
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#if defined(__KERNEL__) && !defined(STANDALONE)
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- *oobp++ = REG_NAND_DATA8;
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+ *oobp++ = readb(®_NAND_DATA8);
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#else
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- REG_NAND_DATA8;
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+ readb(®_NAND_DATA8);
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#endif
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numToRead--;
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}
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@@ -193,11 +192,11 @@ static inline void nand_bcm_umi_bch_read_oobEcc(uint32_t pageSize,
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while (numToRead > 11) {
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#if defined(__KERNEL__) && !defined(STANDALONE)
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- *oobp = REG_NAND_DATA8;
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+ *oobp = readb(®_NAND_DATA8);
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eccCalc[eccPos++] = *oobp;
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oobp++;
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#else
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- eccCalc[eccPos++] = REG_NAND_DATA8;
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+ eccCalc[eccPos++] = readb(®_NAND_DATA8);
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#endif
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numToRead--;
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}
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@@ -207,9 +206,9 @@ static inline void nand_bcm_umi_bch_read_oobEcc(uint32_t pageSize,
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if (numToRead == 11) {
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/* read BI */
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#if defined(__KERNEL__) && !defined(STANDALONE)
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- *oobp++ = REG_NAND_DATA8;
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+ *oobp++ = readb(®_NAND_DATA8);
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#else
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- REG_NAND_DATA8;
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+ readb(®_NAND_DATA8);
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#endif
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numToRead--;
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}
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@@ -219,11 +218,11 @@ static inline void nand_bcm_umi_bch_read_oobEcc(uint32_t pageSize,
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nand_bcm_umi_bch_resume_read_ecc_calc();
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while (numToRead) {
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#if defined(__KERNEL__) && !defined(STANDALONE)
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- *oobp = REG_NAND_DATA8;
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+ *oobp = readb(®_NAND_DATA8);
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eccCalc[eccPos++] = *oobp;
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oobp++;
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#else
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- eccCalc[eccPos++] = REG_NAND_DATA8;
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+ eccCalc[eccPos++] = readb(®_NAND_DATA8);
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#endif
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numToRead--;
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}
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@@ -255,7 +254,7 @@ static inline void nand_bcm_umi_bch_write_oobEcc(uint32_t pageSize,
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if (pageSize == NAND_DATA_ACCESS_SIZE) {
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/* Now fill in the ECC bytes */
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if (numEccBytes >= 13)
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- eccVal = REG_UMI_BCH_WR_ECC_3;
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+ eccVal = readl(®_UMI_BCH_WR_ECC_3);
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/* Usually we skip CM in oob[0,1] */
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NAND_BCM_UMI_ECC_WRITE(numEccBytes, 15, &oobp[0],
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@@ -268,7 +267,7 @@ static inline void nand_bcm_umi_bch_write_oobEcc(uint32_t pageSize,
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eccVal & 0xff); /* ECC 12 */
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if (numEccBytes >= 9)
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- eccVal = REG_UMI_BCH_WR_ECC_2;
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+ eccVal = readl(®_UMI_BCH_WR_ECC_2);
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NAND_BCM_UMI_ECC_WRITE(numEccBytes, 12, &oobp[3],
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(eccVal >> 24) & 0xff); /* ECC11 */
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@@ -281,7 +280,7 @@ static inline void nand_bcm_umi_bch_write_oobEcc(uint32_t pageSize,
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/* Now fill in the ECC bytes */
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if (numEccBytes >= 13)
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- eccVal = REG_UMI_BCH_WR_ECC_3;
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+ eccVal = readl(®_UMI_BCH_WR_ECC_3);
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/* Usually skip CM in oob[1,2] */
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NAND_BCM_UMI_ECC_WRITE(numEccBytes, 15, &oobp[1],
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@@ -294,7 +293,7 @@ static inline void nand_bcm_umi_bch_write_oobEcc(uint32_t pageSize,
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eccVal & 0xff); /* ECC12 */
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if (numEccBytes >= 9)
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- eccVal = REG_UMI_BCH_WR_ECC_2;
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+ eccVal = readl(®_UMI_BCH_WR_ECC_2);
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NAND_BCM_UMI_ECC_WRITE(numEccBytes, 12, &oobp[4],
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(eccVal >> 24) & 0xff); /* ECC11 */
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@@ -309,7 +308,7 @@ static inline void nand_bcm_umi_bch_write_oobEcc(uint32_t pageSize,
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eccVal & 0xff); /* ECC8 */
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if (numEccBytes >= 5)
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- eccVal = REG_UMI_BCH_WR_ECC_1;
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+ eccVal = readl(®_UMI_BCH_WR_ECC_1);
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NAND_BCM_UMI_ECC_WRITE(numEccBytes, 8, &oobp[8],
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(eccVal >> 24) & 0xff); /* ECC7 */
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@@ -321,7 +320,7 @@ static inline void nand_bcm_umi_bch_write_oobEcc(uint32_t pageSize,
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eccVal & 0xff); /* ECC4 */
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if (numEccBytes >= 1)
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- eccVal = REG_UMI_BCH_WR_ECC_0;
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+ eccVal = readl(®_UMI_BCH_WR_ECC_0);
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NAND_BCM_UMI_ECC_WRITE(numEccBytes, 4, &oobp[12],
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(eccVal >> 24) & 0xff); /* ECC3 */
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