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@@ -2764,6 +2764,29 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_m
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
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#endif /*CONFIG_MMC_RICOH_MMC*/
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+#if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
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+#define VTUNCERRMSK_REG 0x1ac
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+#define VTD_MSK_SPEC_ERRORS (1 << 31)
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+/*
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+ * This is a quirk for masking vt-d spec defined errors to platform error
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+ * handling logic. With out this, platforms using Intel 7500, 5500 chipsets
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+ * (and the derivative chipsets like X58 etc) seem to generate NMI/SMI (based
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+ * on the RAS config settings of the platform) when a vt-d fault happens.
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+ * The resulting SMI caused the system to hang.
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+ *
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+ * VT-d spec related errors are already handled by the VT-d OS code, so no
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+ * need to report the same error through other channels.
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+ */
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+static void vtd_mask_spec_errors(struct pci_dev *dev)
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+{
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+ u32 word;
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+
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+ pci_read_config_dword(dev, VTUNCERRMSK_REG, &word);
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+ pci_write_config_dword(dev, VTUNCERRMSK_REG, word | VTD_MSK_SPEC_ERRORS);
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+}
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+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x342e, vtd_mask_spec_errors);
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+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x3c28, vtd_mask_spec_errors);
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+#endif
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static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
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struct pci_fixup *end)
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