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@@ -2359,7 +2359,7 @@ static irqreturn_t ixgbe_intr(int irq, void *data)
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u32 eicr;
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/*
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- * Workaround for silicon errata on 82598. Mask the interrupts
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+ * Workaround for silicon errata #26 on 82598. Mask the interrupt
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* before the read of EICR.
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*/
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IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
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@@ -4381,7 +4381,11 @@ static inline bool ixgbe_set_fdir_queues(struct ixgbe_adapter *adapter)
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f_fdir->indices = min((int)num_online_cpus(), f_fdir->indices);
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f_fdir->mask = 0;
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- /* Flow Director must have RSS enabled */
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+ /*
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+ * Use RSS in addition to Flow Director to ensure the best
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+ * distribution of flows across cores, even when an FDIR flow
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+ * isn't matched.
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+ */
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if ((adapter->flags & IXGBE_FLAG_RSS_ENABLED) &&
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(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE)) {
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adapter->num_tx_queues = f_fdir->indices;
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@@ -4558,7 +4562,8 @@ static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
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*/
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vector_threshold = MIN_MSIX_COUNT;
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- /* The more we get, the more we will assign to Tx/Rx Cleanup
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+ /*
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+ * The more we get, the more we will assign to Tx/Rx Cleanup
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* for the separate queues...where Rx Cleanup >= Tx Cleanup.
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* Right now, we simply care about how many we'll get; we'll
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* set them up later while requesting irq's.
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@@ -6996,7 +7001,7 @@ netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
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/*
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* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
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- * + 1 desc for skb_head_len/IXGBE_MAX_DATA_PER_TXD,
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+ * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
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* + 2 desc gap to keep tail from touching head,
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* + 1 desc for context descriptor,
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* otherwise try next time
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