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@@ -85,6 +85,7 @@ struct nand_flash_dev nand_flash_ids[] = {
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{"NAND 128MiB 3,3V 8-bit", 0xD1, 0, 128, 0, LP_OPTIONS},
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{"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16},
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{"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16},
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+ {"NAND 128MiB 1,8V 16-bit", 0xAD, 0, 128, 0, LP_OPTIONS16},
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/* 2 Gigabit */
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{"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS},
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@@ -110,6 +111,9 @@ struct nand_flash_dev nand_flash_ids[] = {
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{"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16},
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{"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16},
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+ /* 32 Gigabit */
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+ {"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 4096, 0, LP_OPTIONS16},
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+
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/*
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* Renesas AND 1 Gigabit. Those chips do not support extended id and
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* have a strange page/block layout ! The chosen minimum erasesize is
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