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@@ -1,3 +1,13 @@
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+/* two abstractions specific to kernel/smpboot.c, mainly to cater to visws
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+ * which needs to alter them. */
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+
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+static inline void smpboot_clear_io_apic_irqs(void)
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+{
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+#ifdef CONFIG_X86_IO_APIC
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+ io_apic_irqs = 0;
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+#endif
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+}
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+
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static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
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{
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CMOS_WRITE(0xa, 0xf);
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@@ -9,20 +19,41 @@ static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
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Dprintk("3.\n");
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}
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-/* for visws do nothing for any of these */
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-
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-static inline void smpboot_clear_io_apic_irqs(void)
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-{
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-}
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-
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static inline void smpboot_restore_warm_reset_vector(void)
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{
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+ /*
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+ * Install writable page 0 entry to set BIOS data area.
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+ */
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+ local_flush_tlb();
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+
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+ /*
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+ * Paranoid: Set warm reset code and vector here back
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+ * to default values.
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+ */
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+ CMOS_WRITE(0, 0xf);
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+
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+ *((volatile long *) phys_to_virt(0x467)) = 0;
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}
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-static inline void smpboot_setup_io_apic(void)
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+static inline void __init smpboot_setup_io_apic(void)
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{
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+#ifdef CONFIG_X86_IO_APIC
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+ /*
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+ * Here we can be sure that there is an IO-APIC in the system. Let's
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+ * go and set it up:
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+ */
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+ if (!skip_ioapic_setup && nr_ioapics)
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+ setup_IO_APIC();
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+ else {
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+ nr_ioapics = 0;
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+ localise_nmi_watchdog();
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+ }
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+#endif
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}
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static inline void smpboot_clear_io_apic(void)
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{
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+#ifdef CONFIG_X86_IO_APIC
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+ nr_ioapics = 0;
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+#endif
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}
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