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@@ -1079,9 +1079,10 @@ err:
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static int msi3101_set_tuner(struct msi3101_state *s)
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{
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- int i, ret, len;
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- u32 reg, synthstep, thresh, n, frac;
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- u64 fsynth;
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+ int ret, i, len;
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+ unsigned int n, m, thresh, frac, vco_step, tmp;
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+ u32 reg;
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+ u64 f_vco;
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u8 mode, lo_div;
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const struct msi3101_gain *gain_lut;
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static const struct {
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@@ -1176,21 +1177,30 @@ static int msi3101_set_tuner(struct msi3101_state *s)
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if (i == ARRAY_SIZE(bandwidth_lut))
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goto err;
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- #define FSTEP 10000
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- #define FREF1 24000000
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- fsynth = (rf_freq + 0) * lo_div;
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- synthstep = FSTEP * lo_div;
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- thresh = (FREF1 * 4) / synthstep;
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- n = fsynth / (FREF1 * 4);
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- frac = thresh * (fsynth % (FREF1 * 4)) / (FREF1 * 4);
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+#define F_OUT_STEP 1
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+#define R_REF 4
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+#define F_IF 0
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+ f_vco = (rf_freq + F_IF) * lo_div;
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+ n = f_vco / (F_REF * R_REF);
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+ m = f_vco % (F_REF * R_REF);
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- if (thresh > 4095 || n > 63 || frac > 4095) {
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- dev_dbg(&s->udev->dev,
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- "%s: synth setup failed rf=%d thresh=%d n=%d frac=%d\n",
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- __func__, rf_freq, thresh, n, frac);
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- ret = -EINVAL;
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- goto err;
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- }
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+ vco_step = F_OUT_STEP * lo_div;
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+ thresh = (F_REF * R_REF) / vco_step;
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+ frac = 1ul * thresh * m / (F_REF * R_REF);
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+
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+ /* Divide to reg max. After that RF resolution will be +-500Hz. */
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+ tmp = DIV_ROUND_UP(thresh, 4095);
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+ thresh = DIV_ROUND_CLOSEST(thresh, tmp);
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+ frac = DIV_ROUND_CLOSEST(frac, tmp);
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+
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+ /* calc real RF set */
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+ tmp = 1ul * F_REF * R_REF * n;
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+ tmp += 1ul * F_REF * R_REF * frac / thresh;
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+ tmp /= lo_div;
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+
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+ dev_dbg(&s->udev->dev,
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+ "%s: rf=%u:%u n=%d thresh=%d frac=%d\n",
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+ __func__, rf_freq, tmp, n, thresh, frac);
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ret = msi3101_tuner_write(s, 0x00000e);
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ret = msi3101_tuner_write(s, 0x000003);
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