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@@ -1594,7 +1594,7 @@ static u8 bnx2x_ext_phy_resolve_fc(struct link_params *params,
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MDIO_AN_REG_ADV_PAUSE_MASK) >> 8;
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pause_result |= (lp_pause &
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MDIO_AN_REG_ADV_PAUSE_MASK) >> 10;
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- DP(NETIF_MSG_LINK, "Ext PHY pause result 0x%x \n",
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+ DP(NETIF_MSG_LINK, "Ext PHY pause result 0x%x\n",
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pause_result);
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bnx2x_pause_resolve(vars, pause_result);
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if (vars->flow_ctrl == BNX2X_FLOW_CTRL_NONE &&
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@@ -1616,7 +1616,7 @@ static u8 bnx2x_ext_phy_resolve_fc(struct link_params *params,
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MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) >> 7;
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bnx2x_pause_resolve(vars, pause_result);
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- DP(NETIF_MSG_LINK, "Ext PHY CL37 pause result 0x%x \n",
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+ DP(NETIF_MSG_LINK, "Ext PHY CL37 pause result 0x%x\n",
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pause_result);
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}
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}
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@@ -1974,7 +1974,7 @@ static u8 bnx2x_link_settings_status(struct link_params *params,
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}
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}
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- DP(NETIF_MSG_LINK, "gp_status 0x%x phy_link_up %x line_speed %x \n",
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+ DP(NETIF_MSG_LINK, "gp_status 0x%x phy_link_up %x line_speed %x\n",
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gp_status, vars->phy_link_up, vars->line_speed);
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DP(NETIF_MSG_LINK, "duplex %x flow_ctrl 0x%x"
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" autoneg 0x%x\n",
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@@ -3852,7 +3852,7 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
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SPEED_AUTO_NEG) &&
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((params->speed_cap_mask &
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PORT_HW_CFG_SPEED_CAPABILITY_D0_1G))) {
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- DP(NETIF_MSG_LINK, "Setting 1G clause37 \n");
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+ DP(NETIF_MSG_LINK, "Setting 1G clause37\n");
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bnx2x_cl45_write(bp, params->port, ext_phy_type,
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ext_phy_addr, MDIO_AN_DEVAD,
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MDIO_AN_REG_ADV, 0x20);
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@@ -4234,14 +4234,14 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
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ext_phy_addr,
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MDIO_PMA_DEVAD,
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MDIO_PMA_REG_10G_CTRL2, &tmp1);
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- DP(NETIF_MSG_LINK, "1.7 = 0x%x \n", tmp1);
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+ DP(NETIF_MSG_LINK, "1.7 = 0x%x\n", tmp1);
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} else if ((params->req_line_speed ==
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SPEED_AUTO_NEG) &&
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((params->speed_cap_mask &
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PORT_HW_CFG_SPEED_CAPABILITY_D0_1G))) {
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- DP(NETIF_MSG_LINK, "Setting 1G clause37 \n");
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+ DP(NETIF_MSG_LINK, "Setting 1G clause37\n");
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bnx2x_cl45_write(bp, params->port, ext_phy_type,
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ext_phy_addr, MDIO_AN_DEVAD,
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MDIO_PMA_REG_8727_MISC_CTRL, 0);
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