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@@ -286,6 +286,21 @@ static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid)
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return ret;
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}
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+static void __iommu_build_inv_iommu_pages(struct iommu_cmd *cmd, u64 address,
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+ u16 domid, int pde, int s)
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+{
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+ memset(cmd, 0, sizeof(*cmd));
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+ address &= PAGE_MASK;
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+ CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES);
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+ cmd->data[1] |= domid;
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+ cmd->data[2] = lower_32_bits(address);
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+ cmd->data[3] = upper_32_bits(address);
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+ if (s) /* size bit - we flush more than one 4kb page */
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+ cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
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+ if (pde) /* PDE bit - we wan't flush everything not only the PTEs */
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+ cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK;
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+}
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+
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/*
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* Generic command send function for invalidaing TLB entries
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*/
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@@ -295,16 +310,7 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
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struct iommu_cmd cmd;
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int ret;
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- memset(&cmd, 0, sizeof(cmd));
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- address &= PAGE_MASK;
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- CMD_SET_TYPE(&cmd, CMD_INV_IOMMU_PAGES);
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- cmd.data[1] |= domid;
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- cmd.data[2] = lower_32_bits(address);
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- cmd.data[3] = upper_32_bits(address);
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- if (s) /* size bit - we flush more than one 4kb page */
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- cmd.data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
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- if (pde) /* PDE bit - we wan't flush everything not only the PTEs */
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- cmd.data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK;
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+ __iommu_build_inv_iommu_pages(&cmd, address, domid, pde, s);
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ret = iommu_queue_command(iommu, &cmd);
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