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@@ -79,11 +79,30 @@
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#define USB_INTEL_USB3_PSSEN 0xD8
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#define USB_INTEL_USB3PRM 0xDC
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+/*
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+ * amd_chipset_gen values represent AMD different chipset generations
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+ */
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+enum amd_chipset_gen {
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+ NOT_AMD_CHIPSET = 0,
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+ AMD_CHIPSET_SB600,
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+ AMD_CHIPSET_SB700,
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+ AMD_CHIPSET_SB800,
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+ AMD_CHIPSET_HUDSON2,
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+ AMD_CHIPSET_BOLTON,
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+ AMD_CHIPSET_YANGTZE,
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+ AMD_CHIPSET_UNKNOWN,
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+};
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+
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+struct amd_chipset_type {
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+ enum amd_chipset_gen gen;
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+ u8 rev;
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+};
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+
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static struct amd_chipset_info {
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struct pci_dev *nb_dev;
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struct pci_dev *smbus_dev;
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int nb_type;
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- int sb_type;
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+ struct amd_chipset_type sb_type;
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int isoc_reqs;
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int probe_count;
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int probe_result;
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@@ -91,6 +110,51 @@ static struct amd_chipset_info {
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static DEFINE_SPINLOCK(amd_lock);
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+/*
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+ * amd_chipset_sb_type_init - initialize amd chipset southbridge type
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+ *
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+ * AMD FCH/SB generation and revision is identified by SMBus controller
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+ * vendor, device and revision IDs.
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+ *
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+ * Returns: 1 if it is an AMD chipset, 0 otherwise.
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+ */
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+int amd_chipset_sb_type_init(struct amd_chipset_info *pinfo)
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+{
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+ u8 rev = 0;
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+ pinfo->sb_type.gen = AMD_CHIPSET_UNKNOWN;
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+
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+ pinfo->smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI,
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+ PCI_DEVICE_ID_ATI_SBX00_SMBUS, NULL);
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+ if (pinfo->smbus_dev) {
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+ rev = pinfo->smbus_dev->revision;
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+ if (rev >= 0x10 && rev <= 0x1f)
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+ pinfo->sb_type.gen = AMD_CHIPSET_SB600;
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+ else if (rev >= 0x30 && rev <= 0x3f)
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+ pinfo->sb_type.gen = AMD_CHIPSET_SB700;
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+ else if (rev >= 0x40 && rev <= 0x4f)
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+ pinfo->sb_type.gen = AMD_CHIPSET_SB800;
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+ } else {
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+ pinfo->smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
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+ PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
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+
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+ if (!pinfo->smbus_dev) {
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+ pinfo->sb_type.gen = NOT_AMD_CHIPSET;
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+ return 0;
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+ }
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+
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+ rev = pinfo->smbus_dev->revision;
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+ if (rev >= 0x11 && rev <= 0x14)
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+ pinfo->sb_type.gen = AMD_CHIPSET_HUDSON2;
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+ else if (rev >= 0x15 && rev <= 0x18)
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+ pinfo->sb_type.gen = AMD_CHIPSET_BOLTON;
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+ else if (rev >= 0x39 && rev <= 0x3a)
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+ pinfo->sb_type.gen = AMD_CHIPSET_YANGTZE;
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+ }
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+
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+ pinfo->sb_type.rev = rev;
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+ return 1;
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+}
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+
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void sb800_prefetch(struct device *dev, int on)
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{
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u16 misc;
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@@ -106,7 +170,6 @@ EXPORT_SYMBOL_GPL(sb800_prefetch);
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int usb_amd_find_chipset_info(void)
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{
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- u8 rev = 0;
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unsigned long flags;
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struct amd_chipset_info info;
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int ret;
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@@ -122,27 +185,17 @@ int usb_amd_find_chipset_info(void)
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memset(&info, 0, sizeof(info));
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spin_unlock_irqrestore(&amd_lock, flags);
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- info.smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI, 0x4385, NULL);
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- if (info.smbus_dev) {
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- rev = info.smbus_dev->revision;
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- if (rev >= 0x40)
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- info.sb_type = 1;
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- else if (rev >= 0x30 && rev <= 0x3b)
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- info.sb_type = 3;
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- } else {
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- info.smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
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- 0x780b, NULL);
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- if (!info.smbus_dev) {
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- ret = 0;
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- goto commit;
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- }
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-
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- rev = info.smbus_dev->revision;
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- if (rev >= 0x11 && rev <= 0x18)
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- info.sb_type = 2;
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+ if (!amd_chipset_sb_type_init(&info)) {
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+ ret = 0;
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+ goto commit;
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}
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- if (info.sb_type == 0) {
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+ /* Below chipset generations needn't enable AMD PLL quirk */
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+ if (info.sb_type.gen == AMD_CHIPSET_UNKNOWN ||
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+ info.sb_type.gen == AMD_CHIPSET_SB600 ||
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+ info.sb_type.gen == AMD_CHIPSET_YANGTZE ||
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+ (info.sb_type.gen == AMD_CHIPSET_SB700 &&
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+ info.sb_type.rev > 0x3b)) {
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if (info.smbus_dev) {
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pci_dev_put(info.smbus_dev);
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info.smbus_dev = NULL;
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@@ -229,7 +282,9 @@ static void usb_amd_quirk_pll(int disable)
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}
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}
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- if (amd_chipset.sb_type == 1 || amd_chipset.sb_type == 2) {
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+ if (amd_chipset.sb_type.gen == AMD_CHIPSET_SB800 ||
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+ amd_chipset.sb_type.gen == AMD_CHIPSET_HUDSON2 ||
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+ amd_chipset.sb_type.gen == AMD_CHIPSET_BOLTON) {
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outb_p(AB_REG_BAR_LOW, 0xcd6);
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addr_low = inb_p(0xcd7);
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outb_p(AB_REG_BAR_HIGH, 0xcd6);
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@@ -240,7 +295,8 @@ static void usb_amd_quirk_pll(int disable)
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outl_p(0x40, AB_DATA(addr));
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outl_p(0x34, AB_INDX(addr));
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val = inl_p(AB_DATA(addr));
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- } else if (amd_chipset.sb_type == 3) {
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+ } else if (amd_chipset.sb_type.gen == AMD_CHIPSET_SB700 &&
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+ amd_chipset.sb_type.rev <= 0x3b) {
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pci_read_config_dword(amd_chipset.smbus_dev,
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AB_REG_BAR_SB700, &addr);
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outl(AX_INDXC, AB_INDX(addr));
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@@ -353,7 +409,7 @@ void usb_amd_dev_put(void)
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amd_chipset.nb_dev = NULL;
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amd_chipset.smbus_dev = NULL;
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amd_chipset.nb_type = 0;
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- amd_chipset.sb_type = 0;
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+ memset(&amd_chipset.sb_type, 0, sizeof(amd_chipset.sb_type));
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amd_chipset.isoc_reqs = 0;
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amd_chipset.probe_result = 0;
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