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@@ -67,27 +67,27 @@ static void bfin_sir_stop_tx(struct bfin_sir_port *port)
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disable_dma(port->tx_dma_channel);
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#endif
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- while (!(SIR_UART_GET_LSR(port) & THRE)) {
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+ while (!(UART_GET_LSR(port) & THRE)) {
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cpu_relax();
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continue;
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}
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- SIR_UART_STOP_TX(port);
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+ UART_CLEAR_IER(port, ETBEI);
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}
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static void bfin_sir_enable_tx(struct bfin_sir_port *port)
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{
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- SIR_UART_ENABLE_TX(port);
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+ UART_SET_IER(port, ETBEI);
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}
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static void bfin_sir_stop_rx(struct bfin_sir_port *port)
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{
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- SIR_UART_STOP_RX(port);
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+ UART_CLEAR_IER(port, ERBFI);
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}
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static void bfin_sir_enable_rx(struct bfin_sir_port *port)
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{
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- SIR_UART_ENABLE_RX(port);
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+ UART_SET_IER(port, ERBFI);
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}
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static int bfin_sir_set_speed(struct bfin_sir_port *port, int speed)
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@@ -116,7 +116,7 @@ static int bfin_sir_set_speed(struct bfin_sir_port *port, int speed)
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do {
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udelay(utime);
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- lsr = SIR_UART_GET_LSR(port);
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+ lsr = UART_GET_LSR(port);
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} while (!(lsr & TEMT) && count--);
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/* The useconds for 1 bits to transmit */
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@@ -125,27 +125,27 @@ static int bfin_sir_set_speed(struct bfin_sir_port *port, int speed)
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/* Clear UCEN bit to reset the UART state machine
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* and control registers
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*/
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- val = SIR_UART_GET_GCTL(port);
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+ val = UART_GET_GCTL(port);
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val &= ~UCEN;
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- SIR_UART_PUT_GCTL(port, val);
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+ UART_PUT_GCTL(port, val);
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/* Set DLAB in LCR to Access THR RBR IER */
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- SIR_UART_SET_DLAB(port);
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+ UART_SET_DLAB(port);
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SSYNC();
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- SIR_UART_PUT_DLL(port, quot & 0xFF);
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- SIR_UART_PUT_DLH(port, (quot >> 8) & 0xFF);
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+ UART_PUT_DLL(port, quot & 0xFF);
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+ UART_PUT_DLH(port, (quot >> 8) & 0xFF);
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SSYNC();
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/* Clear DLAB in LCR */
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- SIR_UART_CLEAR_DLAB(port);
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+ UART_CLEAR_DLAB(port);
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SSYNC();
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- SIR_UART_PUT_LCR(port, lcr);
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+ UART_PUT_LCR(port, lcr);
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- val = SIR_UART_GET_GCTL(port);
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+ val = UART_GET_GCTL(port);
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val |= UCEN;
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- SIR_UART_PUT_GCTL(port, val);
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+ UART_PUT_GCTL(port, val);
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ret = 0;
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break;
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@@ -154,12 +154,12 @@ static int bfin_sir_set_speed(struct bfin_sir_port *port, int speed)
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break;
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}
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- val = SIR_UART_GET_GCTL(port);
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+ val = UART_GET_GCTL(port);
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/* If not add the 'RPOLC', we can't catch the receive interrupt.
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* It's related with the HW layout and the IR transiver.
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*/
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val |= IREN | RPOLC;
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- SIR_UART_PUT_GCTL(port, val);
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+ UART_PUT_GCTL(port, val);
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return ret;
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}
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@@ -168,7 +168,7 @@ static int bfin_sir_is_receiving(struct net_device *dev)
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struct bfin_sir_self *self = netdev_priv(dev);
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struct bfin_sir_port *port = self->sir_port;
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- if (!(SIR_UART_GET_IER(port) & ERBFI))
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+ if (!(UART_GET_IER(port) & ERBFI))
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return 0;
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return self->rx_buff.state != OUTSIDE_FRAME;
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}
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@@ -182,7 +182,7 @@ static void bfin_sir_tx_chars(struct net_device *dev)
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if (self->tx_buff.len != 0) {
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chr = *(self->tx_buff.data);
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- SIR_UART_PUT_CHAR(port, chr);
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+ UART_PUT_CHAR(port, chr);
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self->tx_buff.data++;
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self->tx_buff.len--;
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} else {
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@@ -206,8 +206,8 @@ static void bfin_sir_rx_chars(struct net_device *dev)
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struct bfin_sir_port *port = self->sir_port;
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unsigned char ch;
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- SIR_UART_CLEAR_LSR(port);
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- ch = SIR_UART_GET_CHAR(port);
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+ UART_CLEAR_LSR(port);
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+ ch = UART_GET_CHAR(port);
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async_unwrap_char(dev, &self->stats, &self->rx_buff, ch);
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dev->last_rx = jiffies;
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}
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@@ -219,7 +219,7 @@ static irqreturn_t bfin_sir_rx_int(int irq, void *dev_id)
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struct bfin_sir_port *port = self->sir_port;
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spin_lock(&self->lock);
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- while ((SIR_UART_GET_LSR(port) & DR))
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+ while ((UART_GET_LSR(port) & DR))
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bfin_sir_rx_chars(dev);
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spin_unlock(&self->lock);
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@@ -233,7 +233,7 @@ static irqreturn_t bfin_sir_tx_int(int irq, void *dev_id)
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struct bfin_sir_port *port = self->sir_port;
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spin_lock(&self->lock);
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- if (SIR_UART_GET_LSR(port) & THRE)
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+ if (UART_GET_LSR(port) & THRE)
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bfin_sir_tx_chars(dev);
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spin_unlock(&self->lock);
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@@ -312,7 +312,7 @@ static void bfin_sir_dma_rx_chars(struct net_device *dev)
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struct bfin_sir_port *port = self->sir_port;
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int i;
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- SIR_UART_CLEAR_LSR(port);
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+ UART_CLEAR_LSR(port);
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for (i = port->rx_dma_buf.head; i < port->rx_dma_buf.tail; i++)
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async_unwrap_char(dev, &self->stats, &self->rx_buff, port->rx_dma_buf.buf[i]);
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@@ -430,11 +430,10 @@ static void bfin_sir_shutdown(struct bfin_sir_port *port, struct net_device *dev
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unsigned short val;
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bfin_sir_stop_rx(port);
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- SIR_UART_DISABLE_INTS(port);
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- val = SIR_UART_GET_GCTL(port);
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+ val = UART_GET_GCTL(port);
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val &= ~(UCEN | IREN | RPOLC);
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- SIR_UART_PUT_GCTL(port, val);
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+ UART_PUT_GCTL(port, val);
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#ifdef CONFIG_SIR_BFIN_DMA
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disable_dma(port->tx_dma_channel);
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@@ -518,12 +517,12 @@ static void bfin_sir_send_work(struct work_struct *work)
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* sending data. We also can set the speed, which will
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* reset all the UART.
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*/
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- val = SIR_UART_GET_GCTL(port);
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+ val = UART_GET_GCTL(port);
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val &= ~(IREN | RPOLC);
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- SIR_UART_PUT_GCTL(port, val);
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+ UART_PUT_GCTL(port, val);
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SSYNC();
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val |= IREN | RPOLC;
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- SIR_UART_PUT_GCTL(port, val);
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+ UART_PUT_GCTL(port, val);
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SSYNC();
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/* bfin_sir_set_speed(port, self->speed); */
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