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@@ -335,6 +335,27 @@ nv40_graph_init(struct drm_device *dev)
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nv_wr32(dev, 0x400b38, 0x2ffff800);
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nv_wr32(dev, 0x400b3c, 0x00006000);
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+ /* Tiling related stuff. */
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+ switch (dev_priv->chipset) {
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+ case 0x44:
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+ case 0x4a:
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+ nv_wr32(dev, 0x400bc4, 0x1003d888);
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+ nv_wr32(dev, 0x400bbc, 0xb7a7b500);
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+ break;
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+ case 0x46:
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+ nv_wr32(dev, 0x400bc4, 0x0000e024);
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+ nv_wr32(dev, 0x400bbc, 0xb7a7b520);
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+ break;
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+ case 0x4c:
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+ case 0x4e:
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+ case 0x67:
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+ nv_wr32(dev, 0x400bc4, 0x1003d888);
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+ nv_wr32(dev, 0x400bbc, 0xb7a7b540);
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+ break;
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+ default:
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+ break;
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+ }
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+
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/* Turn all the tiling regions off. */
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for (i = 0; i < pfb->num_tiles; i++)
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nv40_graph_set_region_tiling(dev, i, 0, 0, 0);
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