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@@ -123,6 +123,7 @@ static struct dma_link_info *dma_linked_lch;
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static int dma_lch_count;
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static int dma_chan_count;
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+static int omap_dma_reserve_channels;
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static spinlock_t dma_chan_lock;
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static struct omap_dma_lch *dma_chan;
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@@ -2321,6 +2322,10 @@ static int __init omap_init_dma(void)
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return -ENODEV;
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}
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+ if (cpu_class_is_omap2() && omap_dma_reserve_channels
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+ && (omap_dma_reserve_channels <= dma_lch_count))
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+ dma_lch_count = omap_dma_reserve_channels;
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+
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dma_chan = kzalloc(sizeof(struct omap_dma_lch) * dma_lch_count,
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GFP_KERNEL);
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if (!dma_chan)
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@@ -2371,7 +2376,7 @@ static int __init omap_init_dma(void)
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u8 revision = dma_read(REVISION) & 0xff;
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printk(KERN_INFO "OMAP DMA hardware revision %d.%d\n",
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revision >> 4, revision & 0xf);
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- dma_chan_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
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+ dma_chan_count = dma_lch_count;
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} else {
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dma_chan_count = 0;
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return 0;
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@@ -2437,4 +2442,17 @@ static int __init omap_init_dma(void)
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arch_initcall(omap_init_dma);
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+/*
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+ * Reserve the omap SDMA channels using cmdline bootarg
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+ * "omap_dma_reserve_ch=". The valid range is 1 to 32
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+ */
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+static int __init omap_dma_cmdline_reserve_ch(char *str)
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+{
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+ if (get_option(&str, &omap_dma_reserve_channels) != 1)
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+ omap_dma_reserve_channels = 0;
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+ return 1;
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+}
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+
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+__setup("omap_dma_reserve_ch=", omap_dma_cmdline_reserve_ch);
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+
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