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@@ -50,6 +50,7 @@
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#include <asm/spu.h>
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#include <asm/spu_priv1.h>
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#include <asm/udbg.h>
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+#include <asm/mpic.h>
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#include "interrupt.h"
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#include "iommu.h"
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@@ -80,10 +81,53 @@ static void cell_progress(char *s, unsigned short hex)
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printk("*** %04x : %s\n", hex, s ? s : "");
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}
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+static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
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+{
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+ struct mpic *mpic = desc->handler_data;
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+ unsigned int virq;
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+
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+ virq = mpic_get_one_irq(mpic);
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+ if (virq != NO_IRQ)
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+ generic_handle_irq(virq);
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+ desc->chip->eoi(irq);
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+}
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+
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+static void __init mpic_init_IRQ(void)
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+{
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+ struct device_node *dn;
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+ struct mpic *mpic;
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+ unsigned int virq;
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+
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+ for (dn = NULL;
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+ (dn = of_find_node_by_name(dn, "interrupt-controller"));) {
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+ if (!device_is_compatible(dn, "CBEA,platform-open-pic"))
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+ continue;
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+
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+ /* The MPIC driver will get everything it needs from the
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+ * device-tree, just pass 0 to all arguments
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+ */
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+ mpic = mpic_alloc(dn, 0, 0, 0, 0, " MPIC ");
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+ if (mpic == NULL)
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+ continue;
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+ mpic_init(mpic);
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+
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+ virq = irq_of_parse_and_map(dn, 0);
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+ if (virq == NO_IRQ)
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+ continue;
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+
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+ printk(KERN_INFO "%s : hooking up to IRQ %d\n",
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+ dn->full_name, virq);
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+ set_irq_data(virq, mpic);
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+ set_irq_chained_handler(virq, cell_mpic_cascade);
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+ }
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+}
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+
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+
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static void __init cell_init_irq(void)
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{
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iic_init_IRQ();
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spider_init_IRQ();
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+ mpic_init_IRQ();
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}
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static void __init cell_setup_arch(void)
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