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@@ -5,9 +5,21 @@ Required properties:
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- reg : should specify localbus chip select and size used for the chip.
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- fsl,upm-addr-offset : UPM pattern offset for the address latch.
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- fsl,upm-cmd-offset : UPM pattern offset for the command latch.
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-- gpios : may specify optional GPIO connected to the Ready-Not-Busy pin.
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-Example:
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+Optional properties:
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+- fsl,upm-wait-flags : add chip-dependent short delays after running the
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+ UPM pattern (0x1), after writing a data byte (0x2) or after
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+ writing out a buffer (0x4).
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+- fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
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+ The corresponding address lines are used to select the chip.
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+- gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
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+ (R/B#). For multi-chip devices, "n" GPIO definitions are required
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+ according to the number of chips.
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+- chip-delay : chip dependent delay for transfering data from array to
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+ read registers (tR). Required if property "gpios" is not used
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+ (R/B# pins not connected).
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+
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+Examples:
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upm@1,0 {
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compatible = "fsl,upm-nand";
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@@ -26,3 +38,26 @@ upm@1,0 {
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};
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};
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};
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+
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+upm@3,0 {
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+ #address-cells = <0>;
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+ #size-cells = <0>;
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+ compatible = "tqc,tqm8548-upm-nand", "fsl,upm-nand";
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+ reg = <3 0x0 0x800>;
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+ fsl,upm-addr-offset = <0x10>;
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+ fsl,upm-cmd-offset = <0x08>;
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+ /* Multi-chip NAND device */
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+ fsl,upm-addr-line-cs-offsets = <0x0 0x200>;
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+ fsl,upm-wait-flags = <0x5>;
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+ chip-delay = <25>; // in micro-seconds
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+
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+ nand@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ label = "fs";
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+ reg = <0x00000000 0x10000000>;
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+ };
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+ };
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+};
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