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@@ -320,6 +320,13 @@ static int stb6100_set_frequency(struct dvb_frontend *fe, u32 frequency)
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}
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}
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srate = p.u.qpsk.symbol_rate;
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srate = p.u.qpsk.symbol_rate;
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+ regs[STB6100_DLB] = 0xdc;
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+ /* Disable LPEN */
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+ regs[STB6100_LPEN] &= ~STB6100_LPEN_LPEN; /* PLL Loop disabled */
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+
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+ if ((rc = stb6100_write_regs(state, regs)) < 0)
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+ return rc;
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+
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/* Baseband gain. */
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/* Baseband gain. */
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if (srate >= 15000000)
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if (srate >= 15000000)
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g = 9; // +4 dB
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g = 9; // +4 dB
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@@ -376,9 +383,11 @@ static int stb6100_set_frequency(struct dvb_frontend *fe, u32 frequency)
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/* Power up. */
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/* Power up. */
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regs[STB6100_LPEN] |= STB6100_LPEN_SYNP | STB6100_LPEN_OSCP | STB6100_LPEN_BEN;
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regs[STB6100_LPEN] |= STB6100_LPEN_SYNP | STB6100_LPEN_OSCP | STB6100_LPEN_BEN;
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+ msleep(2);
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if ((rc = stb6100_write_regs(state, regs)) < 0)
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if ((rc = stb6100_write_regs(state, regs)) < 0)
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return rc;
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return rc;
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+ msleep(2);
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regs[STB6100_LPEN] |= STB6100_LPEN_LPEN; /* PLL loop enabled */
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regs[STB6100_LPEN] |= STB6100_LPEN_LPEN; /* PLL loop enabled */
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if ((rc = stb6100_write_reg(state, STB6100_LPEN, regs[STB6100_LPEN])) < 0)
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if ((rc = stb6100_write_reg(state, STB6100_LPEN, regs[STB6100_LPEN])) < 0)
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return rc;
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return rc;
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@@ -393,7 +402,8 @@ static int stb6100_set_frequency(struct dvb_frontend *fe, u32 frequency)
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if ((rc = stb6100_write_reg(state, STB6100_VCO, regs[STB6100_VCO])) < 0)
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if ((rc = stb6100_write_reg(state, STB6100_VCO, regs[STB6100_VCO])) < 0)
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return rc;
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return rc;
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regs[STB6100_FCCK] &= ~STB6100_FCCK_FCCK; /* LPF BW clock disabled */
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regs[STB6100_FCCK] &= ~STB6100_FCCK_FCCK; /* LPF BW clock disabled */
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- if ((rc = stb6100_write_reg(state, STB6100_FCCK, regs[STB6100_FCCK])) < 0)
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+ stb6100_normalise_regs(regs);
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+ if ((rc = stb6100_write_reg_range(state, ®s[1], 1, STB6100_NUMREGS - 3)) < 0)
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return rc;
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return rc;
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msleep(30);
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msleep(30);
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