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@@ -4041,20 +4041,6 @@ static bool bnx2x_get_load_status(struct bnx2x *bp, int engine)
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return val != 0;
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}
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-/*
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- * Reset the load status for the current engine.
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- */
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-static void bnx2x_clear_load_status(struct bnx2x *bp)
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-{
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- u32 val;
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- u32 mask = (BP_PATH(bp) ? BNX2X_PATH1_LOAD_CNT_MASK :
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- BNX2X_PATH0_LOAD_CNT_MASK);
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- bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG);
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- val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG);
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- REG_WR(bp, BNX2X_RECOVERY_GLOB_REG, val & (~mask));
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- bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG);
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-}
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-
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static void _print_next_block(int idx, const char *blk)
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{
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pr_cont("%s%s", idx ? ", " : "", blk);
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@@ -11428,9 +11414,6 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev,
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if (!chip_is_e1x)
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REG_WR(bp, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 1);
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- /* Reset the load counter */
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- bnx2x_clear_load_status(bp);
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-
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dev->watchdog_timeo = TX_TIMEOUT;
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dev->netdev_ops = &bnx2x_netdev_ops;
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