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@@ -5798,6 +5798,12 @@ static int bnx2x_init_hw_common(struct bnx2x *bp)
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DP(BNX2X_MSG_MCP, "starting common init func %d\n", BP_ABS_FUNC(bp));
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+ /*
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+ * take the UNDI lock to protect undi_unload flow from accessing
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+ * registers while we're resetting the chip
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+ */
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+ bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_UNDI);
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+
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bnx2x_reset_common(bp);
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REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0xffffffff);
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@@ -5808,6 +5814,8 @@ static int bnx2x_init_hw_common(struct bnx2x *bp)
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}
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REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, val);
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+ bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_UNDI);
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+
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bnx2x_init_block(bp, BLOCK_MISC, PHASE_COMMON);
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if (!CHIP_IS_E1x(bp)) {
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