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@@ -3411,6 +3411,7 @@ static u32 ar9003_dump_modal_eeprom(char *buf, u32 len, u32 size,
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PR_EEP("Chain1 NF Threshold", modal_hdr->noiseFloorThreshCh[1]);
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PR_EEP("Chain2 NF Threshold", modal_hdr->noiseFloorThreshCh[2]);
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PR_EEP("Quick Drop", modal_hdr->quick_drop);
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+ PR_EEP("txEndToXpaOff", modal_hdr->txEndToXpaOff);
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PR_EEP("xPA Bias Level", modal_hdr->xpaBiasLvl);
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PR_EEP("txFrameToDataStart", modal_hdr->txFrameToDataStart);
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PR_EEP("txFrameToPaOn", modal_hdr->txFrameToPaOn);
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@@ -3956,6 +3957,20 @@ static void ar9003_hw_quick_drop_apply(struct ath_hw *ah, u16 freq)
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REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
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}
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+static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, u16 freq)
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+{
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+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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+ u32 value;
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+
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+ value = (freq < 4000) ? eep->modalHeader2G.txEndToXpaOff :
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+ eep->modalHeader5G.txEndToXpaOff;
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+
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+ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
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+ AR_PHY_XPA_TIMING_CTL_TX_END_XPAB_OFF, value);
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+ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
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+ AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value);
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+}
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+
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static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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@@ -3968,6 +3983,7 @@ static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
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ar9003_hw_internal_regulator_apply(ah);
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if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
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ar9003_hw_apply_tuning_caps(ah);
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+ ar9003_hw_txend_to_xpa_off_apply(ah, chan->channel);
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}
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static void ath9k_hw_ar9300_set_addac(struct ath_hw *ah,
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