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@@ -914,11 +914,72 @@ static inline void omap_init_vout(void) {}
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/*-------------------------------------------------------------------------*/
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+/*
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+ * Inorder to avoid any assumptions from bootloader regarding WDT
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+ * settings, WDT module is reset during init. This enables the watchdog
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+ * timer. Hence it is required to disable the watchdog after the WDT reset
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+ * during init. Otherwise the system would reboot as per the default
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+ * watchdog timer registers settings.
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+ */
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+#define OMAP_WDT_WPS (0x34)
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+#define OMAP_WDT_SPR (0x48)
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+
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+static int omap2_disable_wdt(struct omap_hwmod *oh, void *unused)
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+{
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+ void __iomem *base;
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+ int ret;
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+
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+ if (!oh) {
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+ pr_err("%s: Could not look up wdtimer_hwmod\n", __func__);
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+ return -EINVAL;
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+ }
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+
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+ base = omap_hwmod_get_mpu_rt_va(oh);
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+ if (!base) {
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+ pr_err("%s: Could not get the base address for %s\n",
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+ oh->name, __func__);
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+ return -EINVAL;
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+ }
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+
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+ /* Enable the clocks before accessing the WDT registers */
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+ ret = omap_hwmod_enable(oh);
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+ if (ret) {
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+ pr_err("%s: Could not enable clocks for %s\n",
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+ oh->name, __func__);
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+ return ret;
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+ }
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+
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+ /* sequence required to disable watchdog */
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+ __raw_writel(0xAAAA, base + OMAP_WDT_SPR);
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+ while (__raw_readl(base + OMAP_WDT_WPS) & 0x10)
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+ cpu_relax();
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+
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+ __raw_writel(0x5555, base + OMAP_WDT_SPR);
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+ while (__raw_readl(base + OMAP_WDT_WPS) & 0x10)
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+ cpu_relax();
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+
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+ ret = omap_hwmod_idle(oh);
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+ if (ret)
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+ pr_err("%s: Could not disable clocks for %s\n",
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+ oh->name, __func__);
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+
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+ return ret;
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+}
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+
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+static void __init omap_disable_wdt(void)
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+{
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+ if (cpu_class_is_omap2())
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+ omap_hwmod_for_each_by_class("wd_timer",
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+ omap2_disable_wdt, NULL);
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+ return;
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+}
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+
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static int __init omap2_init_devices(void)
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{
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/* please keep these calls, and their implementations above,
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* in alphabetical order so they're easier to sort through.
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*/
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+ omap_disable_wdt();
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omap_hsmmc_reset();
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omap_init_camera();
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omap_init_mbox();
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