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@@ -1296,7 +1296,25 @@ static int mv_scr_write(struct ata_link *link, unsigned int sc_reg_in, u32 val)
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unsigned int ofs = mv_scr_offset(sc_reg_in);
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if (ofs != 0xffffffffU) {
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- writelfl(val, mv_ap_base(link->ap) + ofs);
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+ void __iomem *addr = mv_ap_base(link->ap) + ofs;
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+ if (sc_reg_in == SCR_CONTROL) {
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+ /*
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+ * Workaround for 88SX60x1 FEr SATA#26:
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+ *
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+ * COMRESETs have to take care not to accidently
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+ * put the drive to sleep when writing SCR_CONTROL.
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+ * Setting bits 12..15 prevents this problem.
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+ *
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+ * So if we see an outbound COMMRESET, set those bits.
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+ * Ditto for the followup write that clears the reset.
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+ *
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+ * The proprietary driver does this for
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+ * all chip versions, and so do we.
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+ */
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+ if ((val & 0xf) == 1 || (readl(addr) & 0xf) == 1)
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+ val |= 0xf000;
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+ }
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+ writelfl(val, addr);
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return 0;
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} else
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return -EINVAL;
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