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@@ -827,15 +827,51 @@ static struct pci_device_id cafe_nand_tbl[] = {
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MODULE_DEVICE_TABLE(pci, cafe_nand_tbl);
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+static int cafe_nand_resume(struct pci_dev *pdev)
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+{
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+ uint32_t ctrl;
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+ struct mtd_info *mtd = pci_get_drvdata(pdev);
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+ struct cafe_priv *cafe = mtd->priv;
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+
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+ /* Start off by resetting the NAND controller completely */
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+ cafe_writel(cafe, 1, NAND_RESET);
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+ cafe_writel(cafe, 0, NAND_RESET);
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+ cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK);
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+
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+ /* Restore timing configuration */
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+ cafe_writel(cafe, timing[0], NAND_TIMING1);
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+ cafe_writel(cafe, timing[1], NAND_TIMING2);
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+ cafe_writel(cafe, timing[2], NAND_TIMING3);
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+
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+ /* Disable master reset, enable NAND clock */
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+ ctrl = cafe_readl(cafe, GLOBAL_CTRL);
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+ ctrl &= 0xffffeff0;
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+ ctrl |= 0x00007000;
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+ cafe_writel(cafe, ctrl | 0x05, GLOBAL_CTRL);
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+ cafe_writel(cafe, ctrl | 0x0a, GLOBAL_CTRL);
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+ cafe_writel(cafe, 0, NAND_DMA_CTRL);
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+ cafe_writel(cafe, 0x7006, GLOBAL_CTRL);
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+ cafe_writel(cafe, 0x700a, GLOBAL_CTRL);
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+
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+ /* Set up DMA address */
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+ cafe_writel(cafe, cafe->dmaaddr & 0xffffffff, NAND_DMA_ADDR0);
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+ if (sizeof(cafe->dmaaddr) > 4)
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+ /* Shift in two parts to shut the compiler up */
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+ cafe_writel(cafe, (cafe->dmaaddr >> 16) >> 16, NAND_DMA_ADDR1);
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+ else
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+ cafe_writel(cafe, 0, NAND_DMA_ADDR1);
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+
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+ /* Enable NAND IRQ in global IRQ mask register */
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+ cafe_writel(cafe, 0x80000007, GLOBAL_IRQ_MASK);
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+ return 0;
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+}
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+
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static struct pci_driver cafe_nand_pci_driver = {
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.name = "CAFÉ NAND",
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.id_table = cafe_nand_tbl,
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.probe = cafe_nand_probe,
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.remove = __devexit_p(cafe_nand_remove),
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-#ifdef CONFIG_PMx
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- .suspend = cafe_nand_suspend,
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.resume = cafe_nand_resume,
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-#endif
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};
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static int cafe_nand_init(void)
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