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@@ -159,7 +159,7 @@ struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
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* Clock which can gate its output. Implements .enable & .disable
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*
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* Flags:
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- * CLK_GATE_SET_DISABLE - by default this clock sets the bit at bit_idx to
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+ * CLK_GATE_SET_TO_DISABLE - by default this clock sets the bit at bit_idx to
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* enable the clock. Setting this flag does the opposite: setting the bit
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* disable the clock and clearing it enables the clock
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*/
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@@ -232,7 +232,7 @@ struct clk *clk_register_divider(struct device *dev, const char *name,
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*
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* Flags:
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* CLK_MUX_INDEX_ONE - register index starts at 1, not 0
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- * CLK_MUX_INDEX_BITWISE - register index is a single bit (power of two)
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+ * CLK_MUX_INDEX_BIT - register index is a single bit (power of two)
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*/
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struct clk_mux {
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struct clk_hw hw;
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