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@@ -74,7 +74,7 @@ static void wl1271_rx_status(struct wl1271 *wl,
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}
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}
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-static void wl1271_rx_handle_data(struct wl1271 *wl, u32 length)
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+static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length)
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{
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struct wl1271_rx_descriptor *desc;
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struct sk_buff *skb;
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@@ -87,16 +87,16 @@ static void wl1271_rx_handle_data(struct wl1271 *wl, u32 length)
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* workaround this by not retrieving them at all.
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*/
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if (unlikely(wl->state == WL1271_STATE_PLT))
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- return;
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+ return -EINVAL;
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skb = __dev_alloc_skb(length, GFP_KERNEL);
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if (!skb) {
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wl1271_error("Couldn't allocate RX frame");
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- return;
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+ return -ENOMEM;
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}
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buf = skb_put(skb, length);
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- wl1271_read(wl, WL1271_SLV_MEM_DATA, buf, length, true);
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+ memcpy(buf, data, length);
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/* the data read starts with the descriptor */
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desc = (struct wl1271_rx_descriptor *) buf;
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@@ -116,6 +116,8 @@ static void wl1271_rx_handle_data(struct wl1271 *wl, u32 length)
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skb_trim(skb, skb->len - desc->pad_len);
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ieee80211_rx_ni(wl->hw, skb);
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+
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+ return 0;
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}
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void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_status *status)
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@@ -124,31 +126,60 @@ void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_status *status)
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u32 buf_size;
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u32 fw_rx_counter = status->fw_rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
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u32 drv_rx_counter = wl->rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
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+ u32 rx_counter;
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u32 mem_block;
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+ u32 pkt_length;
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+ u32 pkt_offset;
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while (drv_rx_counter != fw_rx_counter) {
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- mem_block = wl1271_rx_get_mem_block(status, drv_rx_counter);
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- buf_size = wl1271_rx_get_buf_size(status, drv_rx_counter);
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+ buf_size = 0;
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+ rx_counter = drv_rx_counter;
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+ while (rx_counter != fw_rx_counter) {
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+ pkt_length = wl1271_rx_get_buf_size(status, rx_counter);
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+ if (buf_size + pkt_length > WL1271_AGGR_BUFFER_SIZE)
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+ break;
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+ buf_size += pkt_length;
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+ rx_counter++;
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+ rx_counter &= NUM_RX_PKT_DESC_MOD_MASK;
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+ }
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if (buf_size == 0) {
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wl1271_warning("received empty data");
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break;
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}
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+ /*
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+ * Choose the block we want to read
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+ * For aggregated packets, only the first memory block should
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+ * be retrieved. The FW takes care of the rest.
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+ */
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+ mem_block = wl1271_rx_get_mem_block(status, drv_rx_counter);
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wl->rx_mem_pool_addr.addr = (mem_block << 8) +
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le32_to_cpu(wl_mem_map->packet_memory_pool_start);
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wl->rx_mem_pool_addr.addr_extra =
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wl->rx_mem_pool_addr.addr + 4;
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-
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- /* Choose the block we want to read */
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wl1271_write(wl, WL1271_SLV_REG_DATA, &wl->rx_mem_pool_addr,
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- sizeof(wl->rx_mem_pool_addr), false);
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-
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- wl1271_rx_handle_data(wl, buf_size);
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-
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- wl->rx_counter++;
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- drv_rx_counter = wl->rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
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+ sizeof(wl->rx_mem_pool_addr), false);
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+
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+ /* Read all available packets at once */
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+ wl1271_read(wl, WL1271_SLV_MEM_DATA, wl->aggr_buf,
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+ buf_size, true);
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+
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+ /* Split data into separate packets */
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+ pkt_offset = 0;
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+ while (pkt_offset < buf_size) {
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+ pkt_length = wl1271_rx_get_buf_size(status,
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+ drv_rx_counter);
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+ if (wl1271_rx_handle_data(wl,
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+ wl->aggr_buf + pkt_offset,
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+ pkt_length) < 0)
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+ break;
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+ wl->rx_counter++;
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+ drv_rx_counter++;
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+ drv_rx_counter &= NUM_RX_PKT_DESC_MOD_MASK;
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+ pkt_offset += pkt_length;
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+ }
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}
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-
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- wl1271_write32(wl, RX_DRIVER_COUNTER_ADDRESS, wl->rx_counter);
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+ wl1271_write32(wl, RX_DRIVER_COUNTER_ADDRESS,
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+ cpu_to_le32(wl->rx_counter));
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}
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