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@@ -423,7 +423,6 @@ int amd64_get_dram_hole_info(struct mem_ctl_info *mci, u64 *hole_base,
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u64 *hole_offset, u64 *hole_size)
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{
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struct amd64_pvt *pvt = mci->pvt_info;
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- u64 base;
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/* only revE and later have the DRAM Hole Address Register */
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if (boot_cpu_data.x86 == 0xf && pvt->ext_model < K8_REV_E) {
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@@ -462,10 +461,8 @@ int amd64_get_dram_hole_info(struct mem_ctl_info *mci, u64 *hole_base,
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* addresses in the hole so that they start at 0x100000000.
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*/
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- base = dhar_base(pvt);
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-
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- *hole_base = base;
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- *hole_size = (0x1ull << 32) - base;
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+ *hole_base = dhar_base(pvt);
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+ *hole_size = (1ULL << 32) - *hole_base;
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if (boot_cpu_data.x86 > 0xf)
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*hole_offset = f10_dhar_offset(pvt);
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@@ -513,15 +510,15 @@ static u64 sys_addr_to_dram_addr(struct mem_ctl_info *mci, u64 sys_addr)
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{
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struct amd64_pvt *pvt = mci->pvt_info;
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u64 dram_base, hole_base, hole_offset, hole_size, dram_addr;
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- int ret = 0;
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+ int ret;
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dram_base = get_dram_base(pvt, pvt->mc_node_id);
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ret = amd64_get_dram_hole_info(mci, &hole_base, &hole_offset,
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&hole_size);
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if (!ret) {
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- if ((sys_addr >= (1ull << 32)) &&
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- (sys_addr < ((1ull << 32) + hole_size))) {
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+ if ((sys_addr >= (1ULL << 32)) &&
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+ (sys_addr < ((1ULL << 32) + hole_size))) {
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/* use DHAR to translate SysAddr to DramAddr */
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dram_addr = sys_addr - hole_offset;
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