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@@ -33,6 +33,7 @@
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#include <linux/clk.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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+#include <linux/pm_runtime.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi.h>
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@@ -46,7 +47,6 @@
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#define OMAP2_MCSPI_MAX_CTRL 4
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#define OMAP2_MCSPI_MAX_CTRL 4
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#define OMAP2_MCSPI_REVISION 0x00
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#define OMAP2_MCSPI_REVISION 0x00
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-#define OMAP2_MCSPI_SYSCONFIG 0x10
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#define OMAP2_MCSPI_SYSSTATUS 0x14
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#define OMAP2_MCSPI_SYSSTATUS 0x14
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#define OMAP2_MCSPI_IRQSTATUS 0x18
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#define OMAP2_MCSPI_IRQSTATUS 0x18
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#define OMAP2_MCSPI_IRQENABLE 0x1c
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#define OMAP2_MCSPI_IRQENABLE 0x1c
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@@ -63,13 +63,6 @@
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/* per-register bitmasks: */
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/* per-register bitmasks: */
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-#define OMAP2_MCSPI_SYSCONFIG_SMARTIDLE BIT(4)
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-#define OMAP2_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2)
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-#define OMAP2_MCSPI_SYSCONFIG_AUTOIDLE BIT(0)
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-#define OMAP2_MCSPI_SYSCONFIG_SOFTRESET BIT(1)
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-
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-#define OMAP2_MCSPI_SYSSTATUS_RESETDONE BIT(0)
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-
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#define OMAP2_MCSPI_MODULCTRL_SINGLE BIT(0)
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#define OMAP2_MCSPI_MODULCTRL_SINGLE BIT(0)
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#define OMAP2_MCSPI_MODULCTRL_MS BIT(2)
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#define OMAP2_MCSPI_MODULCTRL_MS BIT(2)
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#define OMAP2_MCSPI_MODULCTRL_STEST BIT(3)
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#define OMAP2_MCSPI_MODULCTRL_STEST BIT(3)
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@@ -122,13 +115,12 @@ struct omap2_mcspi {
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spinlock_t lock;
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spinlock_t lock;
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struct list_head msg_queue;
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struct list_head msg_queue;
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struct spi_master *master;
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struct spi_master *master;
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- struct clk *ick;
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- struct clk *fck;
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/* Virtual base address of the controller */
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/* Virtual base address of the controller */
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void __iomem *base;
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void __iomem *base;
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unsigned long phys;
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unsigned long phys;
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/* SPI1 has 4 channels, while SPI2 has 2 */
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/* SPI1 has 4 channels, while SPI2 has 2 */
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struct omap2_mcspi_dma *dma_channels;
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struct omap2_mcspi_dma *dma_channels;
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+ struct device *dev;
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};
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};
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struct omap2_mcspi_cs {
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struct omap2_mcspi_cs {
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@@ -144,7 +136,6 @@ struct omap2_mcspi_cs {
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* corresponding registers are modified.
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* corresponding registers are modified.
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*/
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*/
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struct omap2_mcspi_regs {
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struct omap2_mcspi_regs {
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- u32 sysconfig;
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u32 modulctrl;
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u32 modulctrl;
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u32 wakeupenable;
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u32 wakeupenable;
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struct list_head cs;
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struct list_head cs;
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@@ -268,9 +259,6 @@ static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
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mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_MODULCTRL,
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mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_MODULCTRL,
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omap2_mcspi_ctx[spi_cntrl->bus_num - 1].modulctrl);
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omap2_mcspi_ctx[spi_cntrl->bus_num - 1].modulctrl);
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- mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_SYSCONFIG,
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- omap2_mcspi_ctx[spi_cntrl->bus_num - 1].sysconfig);
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-
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mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE,
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mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE,
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omap2_mcspi_ctx[spi_cntrl->bus_num - 1].wakeupenable);
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omap2_mcspi_ctx[spi_cntrl->bus_num - 1].wakeupenable);
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@@ -280,20 +268,12 @@ static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
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}
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}
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static void omap2_mcspi_disable_clocks(struct omap2_mcspi *mcspi)
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static void omap2_mcspi_disable_clocks(struct omap2_mcspi *mcspi)
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{
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{
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- clk_disable(mcspi->ick);
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- clk_disable(mcspi->fck);
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+ pm_runtime_put_sync(mcspi->dev);
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}
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}
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static int omap2_mcspi_enable_clocks(struct omap2_mcspi *mcspi)
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static int omap2_mcspi_enable_clocks(struct omap2_mcspi *mcspi)
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{
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{
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- if (clk_enable(mcspi->ick))
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- return -ENODEV;
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- if (clk_enable(mcspi->fck))
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- return -ENODEV;
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-
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- omap2_mcspi_restore_ctx(mcspi);
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-
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- return 0;
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+ return pm_runtime_get_sync(mcspi->dev);
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}
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}
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static int mcspi_wait_for_reg_bit(void __iomem *reg, unsigned long bit)
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static int mcspi_wait_for_reg_bit(void __iomem *reg, unsigned long bit)
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@@ -819,8 +799,9 @@ static int omap2_mcspi_setup(struct spi_device *spi)
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return ret;
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return ret;
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}
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}
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- if (omap2_mcspi_enable_clocks(mcspi))
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- return -ENODEV;
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+ ret = omap2_mcspi_enable_clocks(mcspi);
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+ if (ret < 0)
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+ return ret;
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ret = omap2_mcspi_setup_transfer(spi, NULL);
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ret = omap2_mcspi_setup_transfer(spi, NULL);
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omap2_mcspi_disable_clocks(mcspi);
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omap2_mcspi_disable_clocks(mcspi);
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@@ -863,10 +844,11 @@ static void omap2_mcspi_work(struct work_struct *work)
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struct omap2_mcspi *mcspi;
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struct omap2_mcspi *mcspi;
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mcspi = container_of(work, struct omap2_mcspi, work);
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mcspi = container_of(work, struct omap2_mcspi, work);
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- spin_lock_irq(&mcspi->lock);
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- if (omap2_mcspi_enable_clocks(mcspi))
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- goto out;
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+ if (omap2_mcspi_enable_clocks(mcspi) < 0)
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+ return;
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+
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+ spin_lock_irq(&mcspi->lock);
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/* We only enable one channel at a time -- the one whose message is
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/* We only enable one channel at a time -- the one whose message is
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* at the head of the queue -- although this controller would gladly
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* at the head of the queue -- although this controller would gladly
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@@ -979,10 +961,9 @@ static void omap2_mcspi_work(struct work_struct *work)
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spin_lock_irq(&mcspi->lock);
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spin_lock_irq(&mcspi->lock);
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}
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}
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- omap2_mcspi_disable_clocks(mcspi);
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-
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-out:
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spin_unlock_irq(&mcspi->lock);
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spin_unlock_irq(&mcspi->lock);
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+
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+ omap2_mcspi_disable_clocks(mcspi);
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}
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}
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static int omap2_mcspi_transfer(struct spi_device *spi, struct spi_message *m)
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static int omap2_mcspi_transfer(struct spi_device *spi, struct spi_message *m)
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@@ -1058,25 +1039,15 @@ static int omap2_mcspi_transfer(struct spi_device *spi, struct spi_message *m)
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return 0;
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return 0;
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}
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}
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-static int __init omap2_mcspi_reset(struct omap2_mcspi *mcspi)
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+static int __init omap2_mcspi_master_setup(struct omap2_mcspi *mcspi)
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{
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{
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struct spi_master *master = mcspi->master;
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struct spi_master *master = mcspi->master;
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u32 tmp;
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u32 tmp;
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+ int ret = 0;
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- if (omap2_mcspi_enable_clocks(mcspi))
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- return -1;
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-
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- mcspi_write_reg(master, OMAP2_MCSPI_SYSCONFIG,
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- OMAP2_MCSPI_SYSCONFIG_SOFTRESET);
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- do {
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- tmp = mcspi_read_reg(master, OMAP2_MCSPI_SYSSTATUS);
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- } while (!(tmp & OMAP2_MCSPI_SYSSTATUS_RESETDONE));
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-
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- tmp = OMAP2_MCSPI_SYSCONFIG_AUTOIDLE |
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- OMAP2_MCSPI_SYSCONFIG_ENAWAKEUP |
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- OMAP2_MCSPI_SYSCONFIG_SMARTIDLE;
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- mcspi_write_reg(master, OMAP2_MCSPI_SYSCONFIG, tmp);
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- omap2_mcspi_ctx[master->bus_num - 1].sysconfig = tmp;
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+ ret = omap2_mcspi_enable_clocks(mcspi);
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+ if (ret < 0)
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+ return ret;
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tmp = OMAP2_MCSPI_WAKEUPENABLE_WKEN;
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tmp = OMAP2_MCSPI_WAKEUPENABLE_WKEN;
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mcspi_write_reg(master, OMAP2_MCSPI_WAKEUPENABLE, tmp);
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mcspi_write_reg(master, OMAP2_MCSPI_WAKEUPENABLE, tmp);
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@@ -1087,6 +1058,18 @@ static int __init omap2_mcspi_reset(struct omap2_mcspi *mcspi)
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return 0;
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return 0;
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}
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}
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+static int omap_mcspi_runtime_resume(struct device *dev)
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+{
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+ struct omap2_mcspi *mcspi;
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+ struct spi_master *master;
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+
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+ master = dev_get_drvdata(dev);
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+ mcspi = spi_master_get_devdata(master);
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+ omap2_mcspi_restore_ctx(mcspi);
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+
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+ return 0;
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+}
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+
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static int __init omap2_mcspi_probe(struct platform_device *pdev)
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static int __init omap2_mcspi_probe(struct platform_device *pdev)
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{
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{
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@@ -1136,34 +1119,22 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
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if (!mcspi->base) {
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if (!mcspi->base) {
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dev_dbg(&pdev->dev, "can't ioremap MCSPI\n");
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dev_dbg(&pdev->dev, "can't ioremap MCSPI\n");
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status = -ENOMEM;
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status = -ENOMEM;
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- goto err1aa;
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+ goto err2;
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}
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}
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+ mcspi->dev = &pdev->dev;
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INIT_WORK(&mcspi->work, omap2_mcspi_work);
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INIT_WORK(&mcspi->work, omap2_mcspi_work);
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spin_lock_init(&mcspi->lock);
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spin_lock_init(&mcspi->lock);
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INIT_LIST_HEAD(&mcspi->msg_queue);
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INIT_LIST_HEAD(&mcspi->msg_queue);
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INIT_LIST_HEAD(&omap2_mcspi_ctx[master->bus_num - 1].cs);
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INIT_LIST_HEAD(&omap2_mcspi_ctx[master->bus_num - 1].cs);
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- mcspi->ick = clk_get(&pdev->dev, "ick");
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- if (IS_ERR(mcspi->ick)) {
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- dev_dbg(&pdev->dev, "can't get mcspi_ick\n");
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- status = PTR_ERR(mcspi->ick);
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- goto err1a;
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- }
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- mcspi->fck = clk_get(&pdev->dev, "fck");
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- if (IS_ERR(mcspi->fck)) {
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- dev_dbg(&pdev->dev, "can't get mcspi_fck\n");
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- status = PTR_ERR(mcspi->fck);
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- goto err2;
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- }
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-
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mcspi->dma_channels = kcalloc(master->num_chipselect,
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mcspi->dma_channels = kcalloc(master->num_chipselect,
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sizeof(struct omap2_mcspi_dma),
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sizeof(struct omap2_mcspi_dma),
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GFP_KERNEL);
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GFP_KERNEL);
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if (mcspi->dma_channels == NULL)
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if (mcspi->dma_channels == NULL)
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- goto err3;
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+ goto err2;
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for (i = 0; i < master->num_chipselect; i++) {
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for (i = 0; i < master->num_chipselect; i++) {
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char dma_ch_name[14];
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char dma_ch_name[14];
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@@ -1193,8 +1164,10 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
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mcspi->dma_channels[i].dma_tx_sync_dev = dma_res->start;
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mcspi->dma_channels[i].dma_tx_sync_dev = dma_res->start;
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}
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}
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- if (omap2_mcspi_reset(mcspi) < 0)
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- goto err4;
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+ pm_runtime_enable(&pdev->dev);
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+
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+ if (status || omap2_mcspi_master_setup(mcspi) < 0)
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+ goto err3;
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status = spi_register_master(master);
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status = spi_register_master(master);
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if (status < 0)
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if (status < 0)
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@@ -1203,17 +1176,13 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
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return status;
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return status;
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err4:
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err4:
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- kfree(mcspi->dma_channels);
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+ spi_master_put(master);
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err3:
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err3:
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- clk_put(mcspi->fck);
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+ kfree(mcspi->dma_channels);
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err2:
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err2:
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- clk_put(mcspi->ick);
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-err1a:
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- iounmap(mcspi->base);
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-err1aa:
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release_mem_region(r->start, (r->end - r->start) + 1);
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release_mem_region(r->start, (r->end - r->start) + 1);
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+ iounmap(mcspi->base);
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err1:
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err1:
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- spi_master_put(master);
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return status;
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return status;
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}
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}
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@@ -1229,9 +1198,7 @@ static int __exit omap2_mcspi_remove(struct platform_device *pdev)
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mcspi = spi_master_get_devdata(master);
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mcspi = spi_master_get_devdata(master);
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dma_channels = mcspi->dma_channels;
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dma_channels = mcspi->dma_channels;
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- clk_put(mcspi->fck);
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- clk_put(mcspi->ick);
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-
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+ omap2_mcspi_disable_clocks(mcspi);
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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release_mem_region(r->start, (r->end - r->start) + 1);
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release_mem_region(r->start, (r->end - r->start) + 1);
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@@ -1282,6 +1249,7 @@ static int omap2_mcspi_resume(struct device *dev)
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static const struct dev_pm_ops omap2_mcspi_pm_ops = {
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static const struct dev_pm_ops omap2_mcspi_pm_ops = {
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.resume = omap2_mcspi_resume,
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.resume = omap2_mcspi_resume,
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+ .runtime_resume = omap_mcspi_runtime_resume,
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};
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};
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static struct platform_driver omap2_mcspi_driver = {
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static struct platform_driver omap2_mcspi_driver = {
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