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@@ -2384,6 +2384,33 @@ static int bcm43xx_chip_init(struct bcm43xx_private *bcm)
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}
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}
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bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON); /* dummy read */
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bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON); /* dummy read */
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+ value16 = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED,
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+ BCM43xx_UCODE_REVISION);
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+
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+ dprintk(KERN_INFO PFX "Microcode rev 0x%x, pl 0x%x "
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+ "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", value16,
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+ bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED,
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+ BCM43xx_UCODE_PATCHLEVEL),
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+ (bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED,
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+ BCM43xx_UCODE_DATE) >> 12) & 0xf,
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+ (bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED,
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+ BCM43xx_UCODE_DATE) >> 8) & 0xf,
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+ bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED,
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+ BCM43xx_UCODE_DATE) & 0xff,
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+ (bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED,
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+ BCM43xx_UCODE_TIME) >> 11) & 0x1f,
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+ (bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED,
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+ BCM43xx_UCODE_TIME) >> 5) & 0x3f,
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+ bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED,
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+ BCM43xx_UCODE_TIME) & 0x1f);
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+
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+ if ( value16 > 0x128 ) {
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+ dprintk(KERN_ERR PFX
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+ "Firmware: no support for microcode rev > 0x128\n");
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+ err = -1;
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+ goto err_release_fw;
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+ }
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+
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err = bcm43xx_gpio_init(bcm);
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err = bcm43xx_gpio_init(bcm);
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if (err)
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if (err)
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goto err_release_fw;
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goto err_release_fw;
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