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@@ -417,10 +417,9 @@ static inline int ffs(int x)
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* We cannot do this on 32 bits because at the very least some
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* 486 CPUs did not behave this way.
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*/
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- long tmp = -1;
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asm("bsfl %1,%0"
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: "=r" (r)
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- : "rm" (x), "0" (tmp));
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+ : "rm" (x), "0" (-1));
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#elif defined(CONFIG_X86_CMOV)
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asm("bsfl %1,%0\n\t"
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"cmovzl %2,%0"
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@@ -459,10 +458,9 @@ static inline int fls(int x)
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* We cannot do this on 32 bits because at the very least some
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* 486 CPUs did not behave this way.
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*/
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- long tmp = -1;
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asm("bsrl %1,%0"
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: "=r" (r)
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- : "rm" (x), "0" (tmp));
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+ : "rm" (x), "0" (-1));
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#elif defined(CONFIG_X86_CMOV)
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asm("bsrl %1,%0\n\t"
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"cmovzl %2,%0"
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@@ -490,13 +488,13 @@ static inline int fls(int x)
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#ifdef CONFIG_X86_64
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static __always_inline int fls64(__u64 x)
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{
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- long bitpos = -1;
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+ int bitpos = -1;
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/*
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* AMD64 says BSRQ won't clobber the dest reg if x==0; Intel64 says the
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* dest reg is undefined if x==0, but their CPU architect says its
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* value is written to set it to the same as before.
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*/
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- asm("bsrq %1,%0"
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+ asm("bsrq %1,%q0"
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: "+r" (bitpos)
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: "rm" (x));
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return bitpos + 1;
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