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@@ -1009,7 +1009,7 @@ void exynos_dp_reset_macro(struct exynos_dp_device *dp)
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writel(reg, dp->reg_base + EXYNOS_DP_PHY_TEST);
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}
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-int exynos_dp_init_video(struct exynos_dp_device *dp)
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+void exynos_dp_init_video(struct exynos_dp_device *dp)
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{
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u32 reg;
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@@ -1027,8 +1027,6 @@ int exynos_dp_init_video(struct exynos_dp_device *dp)
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reg = VID_HRES_TH(2) | VID_VRES_TH(0);
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writel(reg, dp->reg_base + EXYNOS_DP_VIDEO_CTL_8);
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-
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- return 0;
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}
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void exynos_dp_set_video_color_format(struct exynos_dp_device *dp,
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