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USB: s3c-hsotg: modify only selected bits in S3C_PHYPWR register

S5PV210 SoCs has 2 USB PHY interfaces, both enabled by writing zero to
S3C_PHYPWR register. HS/OTG driver uses only PHY0, so do not touch bits
related to PHY1.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Marek Szyprowski 15 years ago
parent
commit
1eb838d3e2
1 changed files with 4 additions and 2 deletions
  1. 4 2
      drivers/usb/gadget/s3c-hsotg.c

+ 4 - 2
drivers/usb/gadget/s3c-hsotg.c

@@ -2801,9 +2801,11 @@ static void __devinit s3c_hsotg_initep(struct s3c_hsotg *hsotg,
 static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg)
 {
 	struct clk *xusbxti;
-	u32 osc;
+	u32 pwr, osc;
 
-	writel(0, S3C_PHYPWR);
+	pwr = readl(S3C_PHYPWR);
+	pwr &= ~0x19;
+	writel(pwr, S3C_PHYPWR);
 	mdelay(1);
 
 	osc = hsotg->plat->is_osc ? S3C_PHYCLK_EXT_OSC : 0;