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@@ -42,6 +42,50 @@ struct bfin_twi_regs {
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#undef __BFP
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+struct bfin_twi_iface {
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+ int irq;
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+ spinlock_t lock;
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+ char read_write;
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+ u8 command;
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+ u8 *transPtr;
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+ int readNum;
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+ int writeNum;
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+ int cur_mode;
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+ int manual_stop;
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+ int result;
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+ struct i2c_adapter adap;
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+ struct completion complete;
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+ struct i2c_msg *pmsg;
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+ int msg_num;
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+ int cur_msg;
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+ u16 saved_clkdiv;
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+ u16 saved_control;
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+ struct bfin_twi_regs *regs_base;
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+};
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+
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+#define DEFINE_TWI_REG(reg_name, reg) \
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+static inline u16 read_##reg_name(struct bfin_twi_iface *iface) \
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+ { return iface->regs_base->reg; } \
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+static inline void write_##reg_name(struct bfin_twi_iface *iface, u16 v) \
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+ { iface->regs_base->reg = v; }
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+
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+DEFINE_TWI_REG(CLKDIV, clkdiv)
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+DEFINE_TWI_REG(CONTROL, control)
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+DEFINE_TWI_REG(SLAVE_CTL, slave_ctl)
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+DEFINE_TWI_REG(SLAVE_STAT, slave_stat)
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+DEFINE_TWI_REG(SLAVE_ADDR, slave_addr)
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+DEFINE_TWI_REG(MASTER_CTL, master_ctl)
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+DEFINE_TWI_REG(MASTER_STAT, master_stat)
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+DEFINE_TWI_REG(MASTER_ADDR, master_addr)
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+DEFINE_TWI_REG(INT_STAT, int_stat)
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+DEFINE_TWI_REG(INT_MASK, int_mask)
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+DEFINE_TWI_REG(FIFO_CTL, fifo_ctl)
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+DEFINE_TWI_REG(FIFO_STAT, fifo_stat)
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+DEFINE_TWI_REG(XMT_DATA8, xmt_data8)
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+DEFINE_TWI_REG(XMT_DATA16, xmt_data16)
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+DEFINE_TWI_REG(RCV_DATA8, rcv_data8)
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+DEFINE_TWI_REG(RCV_DATA16, rcv_data16)
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+
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/* ******************** TWO-WIRE INTERFACE (TWI) MASKS ***********************/
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/* TWI_CLKDIV Macros (Use: *pTWI_CLKDIV = CLKLOW(x)|CLKHI(y); ) */
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#define CLKLOW(x) ((x) & 0xFF) /* Periods Clock Is Held Low */
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Sonic Zhang