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@@ -20,7 +20,6 @@
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#include <asm/pgtable.h>
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#include <asm/pgtable.h>
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#include <asm/pci-bridge.h>
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#include <asm/pci-bridge.h>
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#include <asm/mpic.h>
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#include <asm/mpic.h>
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-#include <asm/mpc86xx.h>
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#include <asm/cacheflush.h>
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#include <asm/cacheflush.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_soc.h>
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@@ -30,6 +29,11 @@
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extern void __secondary_start_mpc86xx(void);
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extern void __secondary_start_mpc86xx(void);
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extern unsigned long __secondary_hold_acknowledge;
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extern unsigned long __secondary_hold_acknowledge;
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+#define MCM_PORT_CONFIG_OFFSET 0x10
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+
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+/* Offset from CCSRBAR */
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+#define MPC86xx_MCM_OFFSET (0x1000)
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+#define MPC86xx_MCM_SIZE (0x1000)
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static void __init
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static void __init
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smp_86xx_release_core(int nr)
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smp_86xx_release_core(int nr)
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@@ -48,6 +52,8 @@ smp_86xx_release_core(int nr)
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pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2));
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pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2));
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pcr |= 1 << (nr + 24);
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pcr |= 1 << (nr + 24);
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out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr);
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out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr);
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+
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+ iounmap(mcm_vaddr);
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}
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}
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