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@@ -18,7 +18,6 @@
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#include <asm/io.h>
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#include <asm/system.h>
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-#include <asm/cache.h> /* for L1_CACHE_BYTES */
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#include <asm/superio.h>
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#define DEBUG_RESOURCES 0
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@@ -123,6 +122,10 @@ static int __init pcibios_init(void)
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} else {
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printk(KERN_WARNING "pci_bios != NULL but init() is!\n");
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}
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+
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+ /* Set the CLS for PCI as early as possible. */
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+ pci_cache_line_size = pci_dfl_cache_line_size;
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+
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return 0;
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}
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@@ -171,7 +174,7 @@ void pcibios_set_master(struct pci_dev *dev)
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** upper byte is PCI_LATENCY_TIMER.
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*/
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pci_write_config_word(dev, PCI_CACHE_LINE_SIZE,
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- (0x80 << 8) | (L1_CACHE_BYTES / sizeof(u32)));
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+ (0x80 << 8) | pci_cache_line_size);
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}
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