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@@ -0,0 +1,202 @@
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+/*
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+ * Copyright (C) 2005,2006,2007,2008 Imagination Technologies
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+ */
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+
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+#ifndef __ASM_METAG_PROCESSOR_H
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+#define __ASM_METAG_PROCESSOR_H
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+
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+#include <linux/atomic.h>
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+
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+#include <asm/page.h>
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+#include <asm/ptrace.h>
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+#include <asm/metag_regs.h>
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+
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+/*
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+ * Default implementation of macro that returns current
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+ * instruction pointer ("program counter").
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+ */
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+#define current_text_addr() ({ __label__ _l; _l: &&_l; })
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+
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+/* The task stops where the kernel starts */
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+#define TASK_SIZE PAGE_OFFSET
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+/* Add an extra page of padding at the top of the stack for the guard page. */
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+#define STACK_TOP (TASK_SIZE - PAGE_SIZE)
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+#define STACK_TOP_MAX STACK_TOP
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+
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+/* This decides where the kernel will search for a free chunk of vm
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+ * space during mmap's.
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+ */
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+#define TASK_UNMAPPED_BASE META_MEMORY_BASE
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+
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+typedef struct {
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+ unsigned long seg;
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+} mm_segment_t;
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+
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+#ifdef CONFIG_METAG_FPU
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+struct meta_fpu_context {
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+ TBICTXEXTFPU fpstate;
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+ union {
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+ struct {
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+ TBICTXEXTBB4 fx8_15;
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+ TBICTXEXTFPACC fpacc;
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+ } fx8_15;
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+ struct {
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+ TBICTXEXTFPACC fpacc;
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+ TBICTXEXTBB4 unused;
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+ } nofx8_15;
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+ } extfpstate;
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+ bool needs_restore;
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+};
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+#else
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+struct meta_fpu_context {};
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+#endif
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+
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+#ifdef CONFIG_METAG_DSP
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+struct meta_ext_context {
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+ struct {
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+ TBIEXTCTX ctx;
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+ TBICTXEXTBB8 bb8;
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+ TBIDUAL ax[TBICTXEXTAXX_BYTES / sizeof(TBIDUAL)];
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+ TBICTXEXTHL2 hl2;
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+ TBICTXEXTTDPR ext;
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+ TBICTXEXTRP6 rp;
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+ } regs;
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+
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+ /* DSPRAM A and B save areas. */
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+ void *ram[2];
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+
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+ /* ECH encoded size of DSPRAM save areas. */
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+ unsigned int ram_sz[2];
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+};
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+#else
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+struct meta_ext_context {};
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+#endif
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+
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+struct thread_struct {
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+ PTBICTX kernel_context;
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+ /* A copy of the user process Sig.SaveMask. */
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+ unsigned int user_flags;
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+ struct meta_fpu_context *fpu_context;
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+ void __user *tls_ptr;
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+ unsigned short int_depth;
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+ unsigned short txdefr_failure;
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+ struct meta_ext_context *dsp_context;
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+};
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+
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+#define INIT_THREAD { \
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+ NULL, /* kernel_context */ \
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+ 0, /* user_flags */ \
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+ NULL, /* fpu_context */ \
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+ NULL, /* tls_ptr */ \
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+ 1, /* int_depth - we start in kernel */ \
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+ 0, /* txdefr_failure */ \
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+ NULL, /* dsp_context */ \
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+}
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+
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+/* Needed to make #define as we are referencing 'current', that is not visible
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+ * yet.
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+ *
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+ * Stack layout is as below.
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+
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+ argc argument counter (integer)
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+ argv[0] program name (pointer)
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+ argv[1...N] program args (pointers)
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+ argv[argc-1] end of args (integer)
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+ NULL
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+ env[0...N] environment variables (pointers)
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+ NULL
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+
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+ */
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+#define start_thread(regs, pc, usp) do { \
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+ unsigned int *argc = (unsigned int *) bprm->exec; \
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+ set_fs(USER_DS); \
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+ current->thread.int_depth = 1; \
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+ /* Force this process down to user land */ \
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+ regs->ctx.SaveMask = TBICTX_PRIV_BIT; \
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+ regs->ctx.CurrPC = pc; \
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+ regs->ctx.AX[0].U0 = usp; \
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+ regs->ctx.DX[3].U1 = *((int *)argc); /* argc */ \
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+ regs->ctx.DX[3].U0 = (int)((int *)argc + 1); /* argv */ \
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+ regs->ctx.DX[2].U1 = (int)((int *)argc + \
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+ regs->ctx.DX[3].U1 + 2); /* envp */ \
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+ regs->ctx.DX[2].U0 = 0; /* rtld_fini */ \
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+} while (0)
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+
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+/* Forward declaration, a strange C thing */
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+struct task_struct;
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+
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+/* Free all resources held by a thread. */
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+static inline void release_thread(struct task_struct *dead_task)
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+{
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+}
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+
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+#define copy_segments(tsk, mm) do { } while (0)
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+#define release_segments(mm) do { } while (0)
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+
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+extern void exit_thread(void);
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+
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+/*
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+ * Return saved PC of a blocked thread.
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+ */
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+#define thread_saved_pc(tsk) \
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+ ((unsigned long)(tsk)->thread.kernel_context->CurrPC)
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+#define thread_saved_sp(tsk) \
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+ ((unsigned long)(tsk)->thread.kernel_context->AX[0].U0)
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+#define thread_saved_fp(tsk) \
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+ ((unsigned long)(tsk)->thread.kernel_context->AX[1].U0)
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+
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+unsigned long get_wchan(struct task_struct *p);
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+
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+#define KSTK_EIP(tsk) ((tsk)->thread.kernel_context->CurrPC)
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+#define KSTK_ESP(tsk) ((tsk)->thread.kernel_context->AX[0].U0)
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+
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+#define user_stack_pointer(regs) ((regs)->ctx.AX[0].U0)
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+
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+#define cpu_relax() barrier()
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+
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+extern void setup_txprivext(void);
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+
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+static inline unsigned int hard_processor_id(void)
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+{
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+ unsigned int id;
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+
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+ asm volatile ("MOV %0, TXENABLE\n"
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+ "AND %0, %0, %1\n"
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+ "LSR %0, %0, %2\n"
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+ : "=&d" (id)
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+ : "I" (TXENABLE_THREAD_BITS),
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+ "K" (TXENABLE_THREAD_S)
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+ );
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+
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+ return id;
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+}
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+
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+#define OP3_EXIT 0
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+
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+#define HALT_OK 0
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+#define HALT_PANIC -1
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+
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+/*
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+ * Halt (stop) the hardware thread. This instruction sequence is the
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+ * standard way to cause a Meta hardware thread to exit. The exit code
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+ * is pushed onto the stack which is interpreted by the debug adapter.
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+ */
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+static inline void hard_processor_halt(int exit_code)
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+{
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+ asm volatile ("MOV D1Ar1, %0\n"
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+ "MOV D0Ar6, %1\n"
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+ "MSETL [A0StP],D0Ar6,D0Ar4,D0Ar2\n"
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+ "1:\n"
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+ "SWITCH #0xC30006\n"
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+ "B 1b\n"
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+ : : "r" (exit_code), "K" (OP3_EXIT));
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+}
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+
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+/* Set these hooks to call SoC specific code to restart/halt/power off. */
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+extern void (*soc_restart)(char *cmd);
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+extern void (*soc_halt)(void);
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+
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+extern void show_trace(struct task_struct *tsk, unsigned long *sp,
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+ struct pt_regs *regs);
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+
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+#endif
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