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@@ -134,22 +134,15 @@ extern si_t *si_attach(uint pcidev, osl_t *osh, void *regs, uint bustype,
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extern void si_detach(si_t *sih);
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extern bool si_pci_war16165(si_t *sih);
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-extern uint si_corelist(si_t *sih, uint coreid[]);
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extern uint si_coreid(si_t *sih);
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extern uint si_flag(si_t *sih);
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-extern uint si_intflag(si_t *sih);
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extern uint si_coreidx(si_t *sih);
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-extern uint si_coreunit(si_t *sih);
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-extern uint si_corevendor(si_t *sih);
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extern uint si_corerev(si_t *sih);
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extern void *si_osh(si_t *sih);
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-extern void si_setosh(si_t *sih, osl_t *osh);
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extern uint si_corereg(si_t *sih, uint coreidx, uint regoff, uint mask,
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- uint val);
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-extern void *si_coreregs(si_t *sih);
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+ uint val);
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extern void si_write_wrapperreg(si_t *sih, uint32 offset, uint32 val);
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extern uint32 si_core_cflags(si_t *sih, uint32 mask, uint32 val);
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-extern void si_core_cflags_wo(si_t *sih, uint32 mask, uint32 val);
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extern uint32 si_core_sflags(si_t *sih, uint32 mask, uint32 val);
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extern bool si_iscoreup(si_t *sih);
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extern uint si_findcoreidx(si_t *sih, uint coreid, uint coreunit);
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@@ -160,14 +153,8 @@ extern void *si_setcore(si_t *sih, uint coreid, uint coreunit);
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extern void *si_switch_core(si_t *sih, uint coreid, uint *origidx,
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uint *intr_val);
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extern void si_restore_core(si_t *sih, uint coreid, uint intr_val);
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-extern int si_numaddrspaces(si_t *sih);
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-extern uint32 si_addrspace(si_t *sih, uint asidx);
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-extern uint32 si_addrspacesize(si_t *sih, uint asidx);
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-extern int si_corebist(si_t *sih);
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extern void si_core_reset(si_t *sih, uint32 bits, uint32 resetbits);
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extern void si_core_disable(si_t *sih, uint32 bits);
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-extern uint32 si_clock_rate(uint32 pll_type, uint32 n, uint32 m);
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-extern uint32 si_clock(si_t *sih);
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extern uint32 si_alp_clock(si_t *sih);
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extern uint32 si_ilp_clock(si_t *sih);
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extern void si_pci_setup(si_t *sih, uint coremask);
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@@ -181,54 +168,17 @@ extern void si_clkctl_init(si_t *sih);
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extern u16 si_clkctl_fast_pwrup_delay(si_t *sih);
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extern bool si_clkctl_cc(si_t *sih, uint mode);
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extern int si_clkctl_xtal(si_t *sih, uint what, bool on);
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-extern uint32 si_gpiotimerval(si_t *sih, uint32 mask, uint32 val);
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extern bool si_deviceremoved(si_t *sih);
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extern uint32 si_socram_size(si_t *sih);
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-extern uint32 si_socdevram_size(si_t *sih);
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-extern void si_socdevram(si_t *sih, bool set, u8 *ennable,
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- u8 *protect);
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-extern bool si_socdevram_pkg(si_t *sih);
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extern void si_watchdog(si_t *sih, uint ticks);
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-extern void si_watchdog_ms(si_t *sih, uint32 ms);
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-extern void *si_gpiosetcore(si_t *sih);
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extern uint32 si_gpiocontrol(si_t *sih, uint32 mask, uint32 val,
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u8 priority);
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-extern uint32 si_gpioouten(si_t *sih, uint32 mask, uint32 val, u8 priority);
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-extern uint32 si_gpioout(si_t *sih, uint32 mask, uint32 val, u8 priority);
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-extern uint32 si_gpioin(si_t *sih);
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-extern uint32 si_gpiointpolarity(si_t *sih, uint32 mask, uint32 val,
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- u8 priority);
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-extern uint32 si_gpiointmask(si_t *sih, uint32 mask, uint32 val,
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- u8 priority);
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-extern uint32 si_gpioled(si_t *sih, uint32 mask, uint32 val);
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-extern uint32 si_gpioreserve(si_t *sih, uint32 gpio_num, u8 priority);
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-extern uint32 si_gpiorelease(si_t *sih, uint32 gpio_num, u8 priority);
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-extern uint32 si_gpiopull(si_t *sih, bool updown, uint32 mask, uint32 val);
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-extern uint32 si_gpioevent(si_t *sih, uint regtype, uint32 mask, uint32 val);
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-extern uint32 si_gpio_int_enable(si_t *sih, bool enable);
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-
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-/* GPIO event handlers */
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-extern void *si_gpio_handler_register(si_t *sih, uint32 e, bool lev,
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- gpio_handler_t cb, void *arg);
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-extern void si_gpio_handler_unregister(si_t *sih, void *gpioh);
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-extern void si_gpio_handler_process(si_t *sih);
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-
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-/* Wake-on-wireless-LAN (WOWL) */
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-extern bool si_pci_pmecap(si_t *sih);
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-struct osl_info;
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-extern bool si_pci_fastpmecap(struct osl_info *osh);
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-extern bool si_pci_pmestat(si_t *sih);
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-extern void si_pci_pmeclr(si_t *sih);
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-extern void si_pci_pmeen(si_t *sih);
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-extern uint si_pcie_readreg(void *sih, uint addrtype, uint offset);
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#ifdef BCMSDIO
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extern void si_sdio_init(si_t *sih);
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#endif
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-extern u16 si_d11_devid(si_t *sih);
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-
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#define si_eci(sih) 0
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#define si_eci_init(sih) (0)
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#define si_eci_notify_bt(sih, type, val) (0)
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@@ -245,24 +195,10 @@ extern void si_otp_power(si_t *sih, bool on);
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/* SPROM availability */
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extern bool si_is_sprom_available(si_t *sih);
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-extern bool si_is_sprom_enabled(si_t *sih);
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-extern void si_sprom_enable(si_t *sih, bool enable);
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#ifdef SI_SPROM_PROBE
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extern void si_sprom_init(si_t *sih);
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#endif /* SI_SPROM_PROBE */
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-/* OTP/SROM CIS stuff */
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-extern int si_cis_source(si_t *sih);
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-#define CIS_DEFAULT 0
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-#define CIS_SROM 1
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-#define CIS_OTP 2
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-
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-/* Fab-id information */
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-#define DEFAULT_FAB 0x0 /* Original/first fab used for this chip */
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-#define CSM_FAB7 0x1 /* CSM Fab7 chip */
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-#define TSMC_FAB12 0x2 /* TSMC Fab12/Fab14 chip */
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-#define SMIC_FAB4 0x3 /* SMIC Fab4 chip */
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-
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#define SI_ERROR(args)
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#ifdef BCMDBG
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@@ -394,27 +330,17 @@ extern int si_devpath(si_t *sih, char *path, int size);
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extern char *si_getdevpathvar(si_t *sih, const char *name);
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extern int si_getdevpathintvar(si_t *sih, const char *name);
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-extern u8 si_pcieclkreq(si_t *sih, uint32 mask, uint32 val);
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-extern uint32 si_pcielcreg(si_t *sih, uint32 mask, uint32 val);
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extern void si_war42780_clkreq(si_t *sih, bool clkreq);
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extern void si_pci_sleep(si_t *sih);
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extern void si_pci_down(si_t *sih);
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extern void si_pci_up(si_t *sih);
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-extern void si_pcie_war_ovr_update(si_t *sih, u8 aspm);
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extern void si_pcie_extendL1timer(si_t *sih, bool extend);
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extern int si_pci_fixcfg(si_t *sih);
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-extern void si_chippkg_set(si_t *sih, uint);
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extern void si_chipcontrl_epa4331(si_t *sih, bool on);
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/* Enable Ex-PA for 4313 */
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extern void si_epa_4313war(si_t *sih);
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-/* === debug routines === */
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-extern uint32 si_pciereg(si_t *sih, uint32 offset, uint32 mask, uint32 val,
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- uint type);
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-extern uint32 si_pcieserdesreg(si_t *sih, uint32 mdioslave, uint32 offset,
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- uint32 mask, uint32 val);
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-
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char *si_getnvramflvar(si_t *sih, const char *name);
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/* AMBA Interconnect exported externs */
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