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@@ -85,34 +85,6 @@ END_FTR_SECTION(0, 1)
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/* Catch branch to 0 in real mode */
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trap
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-#ifdef CONFIG_PPC_ISERIES
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- /*
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- * At offset 0x20, there is a pointer to iSeries LPAR data.
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- * This is required by the hypervisor
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- */
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- . = 0x20
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- .llong hvReleaseData-KERNELBASE
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-
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- /*
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- * At offset 0x28 and 0x30 are offsets to the mschunks_map
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- * array (used by the iSeries LPAR debugger to do translation
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- * between physical addresses and absolute addresses) and
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- * to the pidhash table (also used by the debugger)
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- */
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- .llong mschunks_map-KERNELBASE
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- .llong 0 /* pidhash-KERNELBASE SFRXXX */
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-
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- /* Offset 0x38 - Pointer to start of embedded System.map */
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- .globl embedded_sysmap_start
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-embedded_sysmap_start:
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- .llong 0
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- /* Offset 0x40 - Pointer to end of embedded System.map */
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- .globl embedded_sysmap_end
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-embedded_sysmap_end:
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- .llong 0
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-
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-#endif /* CONFIG_PPC_ISERIES */
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-
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/* Secondary processors spin on this value until it goes to 1. */
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.globl __secondary_hold_spinloop
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__secondary_hold_spinloop:
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@@ -124,6 +96,15 @@ __secondary_hold_spinloop:
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__secondary_hold_acknowledge:
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.llong 0x0
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+#ifdef CONFIG_PPC_ISERIES
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+ /*
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+ * At offset 0x20, there is a pointer to iSeries LPAR data.
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+ * This is required by the hypervisor
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+ */
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+ . = 0x20
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+ .llong hvReleaseData-KERNELBASE
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+#endif /* CONFIG_PPC_ISERIES */
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+
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. = 0x60
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/*
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* The following code is used on pSeries to hold secondary processors
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