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@@ -127,14 +127,14 @@ void svga_set_default_seq_regs(void __iomem *regbase)
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}
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}
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/* Set CRTC registers to sane values */
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/* Set CRTC registers to sane values */
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-void svga_set_default_crt_regs(void)
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+void svga_set_default_crt_regs(void __iomem *regbase)
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{
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{
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/* Standard CRT registers CR03 CR08 CR09 CR14 CR17 */
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/* Standard CRT registers CR03 CR08 CR09 CR14 CR17 */
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- svga_wcrt_mask(NULL, 0x03, 0x80, 0x80); /* Enable vertical retrace EVRA */
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- vga_wcrt(NULL, VGA_CRTC_PRESET_ROW, 0);
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- svga_wcrt_mask(NULL, VGA_CRTC_MAX_SCAN, 0, 0x1F);
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- vga_wcrt(NULL, VGA_CRTC_UNDERLINE, 0);
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- vga_wcrt(NULL, VGA_CRTC_MODE, 0xE3);
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+ svga_wcrt_mask(regbase, 0x03, 0x80, 0x80); /* Enable vertical retrace EVRA */
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+ vga_wcrt(regbase, VGA_CRTC_PRESET_ROW, 0);
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+ svga_wcrt_mask(regbase, VGA_CRTC_MAX_SCAN, 0, 0x1F);
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+ vga_wcrt(regbase, VGA_CRTC_UNDERLINE, 0);
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+ vga_wcrt(regbase, VGA_CRTC_MODE, 0xE3);
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}
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}
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void svga_set_textmode_vga_regs(void)
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void svga_set_textmode_vga_regs(void)
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