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@@ -154,28 +154,12 @@ static struct irqaction tegra_timer_irq = {
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.dev_id = &tegra_clockevent,
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};
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-static const struct of_device_id timer_match[] __initconst = {
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- { .compatible = "nvidia,tegra20-timer" },
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- {}
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-};
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-
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-static const struct of_device_id rtc_match[] __initconst = {
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- { .compatible = "nvidia,tegra20-rtc" },
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- {}
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-};
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-
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static void __init tegra20_init_timer(struct device_node *np)
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{
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struct clk *clk;
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unsigned long rate;
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int ret;
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- np = of_find_matching_node(NULL, timer_match);
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- if (!np) {
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- pr_err("Failed to find timer DT node\n");
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- BUG();
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- }
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-
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timer_reg_base = of_iomap(np, 0);
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if (!timer_reg_base) {
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pr_err("Can't map timer registers\n");
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@@ -199,30 +183,6 @@ static void __init tegra20_init_timer(struct device_node *np)
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of_node_put(np);
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- np = of_find_matching_node(NULL, rtc_match);
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- if (!np) {
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- pr_err("Failed to find RTC DT node\n");
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- BUG();
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- }
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-
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- rtc_base = of_iomap(np, 0);
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- if (!rtc_base) {
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- pr_err("Can't map RTC registers");
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- BUG();
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- }
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-
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- /*
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- * rtc registers are used by read_persistent_clock, keep the rtc clock
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- * enabled
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- */
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- clk = clk_get_sys("rtc-tegra", NULL);
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- if (IS_ERR(clk))
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- pr_warn("Unable to get rtc-tegra clock\n");
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- else
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- clk_prepare_enable(clk);
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-
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- of_node_put(np);
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-
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switch (rate) {
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case 12000000:
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timer_writel(0x000b, TIMERUS_USEC_CFG);
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@@ -261,9 +221,34 @@ static void __init tegra20_init_timer(struct device_node *np)
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#ifdef CONFIG_HAVE_ARM_TWD
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twd_local_timer_of_register();
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#endif
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+}
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+CLOCKSOURCE_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer);
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+
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+static void __init tegra20_init_rtc(struct device_node *np)
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+{
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+ struct clk *clk;
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+
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+ rtc_base = of_iomap(np, 0);
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+ if (!rtc_base) {
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+ pr_err("Can't map RTC registers");
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+ BUG();
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+ }
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+
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+ /*
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+ * rtc registers are used by read_persistent_clock, keep the rtc clock
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+ * enabled
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+ */
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+ clk = clk_get_sys("rtc-tegra", NULL);
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+ if (IS_ERR(clk))
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+ pr_warn("Unable to get rtc-tegra clock\n");
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+ else
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+ clk_prepare_enable(clk);
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+
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+ of_node_put(np);
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+
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register_persistent_clock(NULL, tegra_read_persistent_clock);
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}
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-CLOCKSOURCE_OF_DECLARE(tegra20, "nvidia,tegra20-timer", tegra20_init_timer);
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+CLOCKSOURCE_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc);
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#ifdef CONFIG_PM
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static u32 usec_config;
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