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@@ -99,6 +99,8 @@
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#include <linux/prefetch.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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+#include <linux/idr.h>
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+#include <linux/dma-mapping.h>
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#include "musb_core.h"
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@@ -114,6 +116,7 @@
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#define MUSB_DRIVER_NAME "musb-hdrc"
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const char musb_driver_name[] = MUSB_DRIVER_NAME;
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+static DEFINE_IDA(musb_ida);
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MODULE_DESCRIPTION(DRIVER_INFO);
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MODULE_AUTHOR(DRIVER_AUTHOR);
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@@ -130,6 +133,35 @@ static inline struct musb *dev_to_musb(struct device *dev)
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/*-------------------------------------------------------------------------*/
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+int musb_get_id(struct device *dev, gfp_t gfp_mask)
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+{
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+ int ret;
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+ int id;
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+
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+ ret = ida_pre_get(&musb_ida, gfp_mask);
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+ if (!ret) {
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+ dev_err(dev, "failed to reserve resource for id\n");
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+ return -ENOMEM;
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+ }
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+
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+ ret = ida_get_new(&musb_ida, &id);
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+ if (ret < 0) {
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+ dev_err(dev, "failed to allocate a new id\n");
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+ return ret;
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+ }
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+
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+ return id;
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+}
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+EXPORT_SYMBOL_GPL(musb_get_id);
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+
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+void musb_put_id(struct device *dev, int id)
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+{
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+
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+ dev_dbg(dev, "removing id %d\n", id);
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+ ida_remove(&musb_ida, id);
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+}
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+EXPORT_SYMBOL_GPL(musb_put_id);
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+
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#ifndef CONFIG_BLACKFIN
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static int musb_ulpi_read(struct usb_phy *phy, u32 offset)
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{
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@@ -234,6 +266,9 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
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struct musb *musb = hw_ep->musb;
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void __iomem *fifo = hw_ep->fifo;
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+ if (unlikely(len == 0))
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+ return;
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+
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prefetch((u8 *)src);
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dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n",
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@@ -276,6 +311,9 @@ void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
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struct musb *musb = hw_ep->musb;
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void __iomem *fifo = hw_ep->fifo;
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+ if (unlikely(len == 0))
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+ return;
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+
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dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n",
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'R', hw_ep->epnum, fifo, len, dst);
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@@ -348,7 +386,7 @@ void musb_load_testpacket(struct musb *musb)
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/*
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* Handles OTG hnp timeouts, such as b_ase0_brst
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*/
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-void musb_otg_timer_func(unsigned long data)
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+static void musb_otg_timer_func(unsigned long data)
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{
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struct musb *musb = (struct musb *)data;
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unsigned long flags;
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@@ -643,8 +681,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
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break;
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case OTG_STATE_B_PERIPHERAL:
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musb_g_suspend(musb);
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- musb->is_active = is_otg_enabled(musb)
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- && otg->gadget->b_hnp_enable;
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+ musb->is_active = otg->gadget->b_hnp_enable;
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if (musb->is_active) {
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musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
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dev_dbg(musb->controller, "HNP: Setting timer for b_ase0_brst\n");
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@@ -660,8 +697,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
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break;
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case OTG_STATE_A_HOST:
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musb->xceiv->state = OTG_STATE_A_SUSPEND;
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- musb->is_active = is_otg_enabled(musb)
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- && otg->host->b_hnp_enable;
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+ musb->is_active = otg->host->b_hnp_enable;
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break;
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case OTG_STATE_B_HOST:
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/* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */
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@@ -749,7 +785,7 @@ b_host:
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case OTG_STATE_A_SUSPEND:
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usb_hcd_resume_root_hub(musb_to_hcd(musb));
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musb_root_disconnect(musb);
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- if (musb->a_wait_bcon != 0 && is_otg_enabled(musb))
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+ if (musb->a_wait_bcon != 0)
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musb_platform_try_idle(musb, jiffies
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+ msecs_to_jiffies(musb->a_wait_bcon));
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break;
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@@ -787,7 +823,7 @@ b_host:
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*/
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if (int_usb & MUSB_INTR_RESET) {
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handled = IRQ_HANDLED;
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- if (is_host_capable() && (devctl & MUSB_DEVCTL_HM) != 0) {
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+ if ((devctl & MUSB_DEVCTL_HM) != 0) {
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/*
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* Looks like non-HS BABBLE can be ignored, but
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* HS BABBLE is an error condition. For HS the solution
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@@ -801,7 +837,7 @@ b_host:
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ERR("Stopping host session -- babble\n");
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musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
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}
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- } else if (is_peripheral_capable()) {
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+ } else {
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dev_dbg(musb->controller, "BUS RESET as %s\n",
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otg_state_string(musb->xceiv->state));
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switch (musb->xceiv->state) {
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@@ -925,25 +961,16 @@ void musb_start(struct musb *musb)
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devctl = musb_readb(regs, MUSB_DEVCTL);
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devctl &= ~MUSB_DEVCTL_SESSION;
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- if (is_otg_enabled(musb)) {
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- /* session started after:
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- * (a) ID-grounded irq, host mode;
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- * (b) vbus present/connect IRQ, peripheral mode;
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- * (c) peripheral initiates, using SRP
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- */
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- if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS)
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- musb->is_active = 1;
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- else
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- devctl |= MUSB_DEVCTL_SESSION;
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-
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- } else if (is_host_enabled(musb)) {
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- /* assume ID pin is hard-wired to ground */
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+ /* session started after:
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+ * (a) ID-grounded irq, host mode;
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+ * (b) vbus present/connect IRQ, peripheral mode;
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+ * (c) peripheral initiates, using SRP
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+ */
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+ if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS)
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+ musb->is_active = 1;
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+ else
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devctl |= MUSB_DEVCTL_SESSION;
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- } else /* peripheral is enabled */ {
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- if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS)
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- musb->is_active = 1;
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- }
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musb_platform_enable(musb);
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musb_writeb(regs, MUSB_DEVCTL, devctl);
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}
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@@ -1007,8 +1034,6 @@ static void musb_shutdown(struct platform_device *pdev)
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musb_generic_disable(musb);
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spin_unlock_irqrestore(&musb->lock, flags);
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- if (!is_otg_enabled(musb) && is_host_enabled(musb))
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- usb_remove_hcd(musb_to_hcd(musb));
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musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
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musb_platform_exit(musb);
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@@ -1302,7 +1327,7 @@ done:
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if (offset < 0) {
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pr_debug("%s: mem overrun, ep %d\n",
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musb_driver_name, epn);
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- return -EINVAL;
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+ return offset;
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}
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epn++;
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musb->nr_endpoints = max(epn, musb->nr_endpoints);
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@@ -1330,7 +1355,7 @@ static int __devinit ep_config_from_hw(struct musb *musb)
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{
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u8 epnum = 0;
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struct musb_hw_ep *hw_ep;
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- void *mbase = musb->mregs;
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+ void __iomem *mbase = musb->mregs;
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int ret = 0;
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dev_dbg(musb->controller, "<== static silicon ep config\n");
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@@ -1571,13 +1596,10 @@ irqreturn_t musb_interrupt(struct musb *musb)
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/* musb_ep_select(musb->mregs, ep_num); */
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/* REVISIT just retval = ep->rx_irq(...) */
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retval = IRQ_HANDLED;
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- if (devctl & MUSB_DEVCTL_HM) {
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- if (is_host_capable())
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- musb_host_rx(musb, ep_num);
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- } else {
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- if (is_peripheral_capable())
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- musb_g_rx(musb, ep_num);
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- }
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+ if (devctl & MUSB_DEVCTL_HM)
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+ musb_host_rx(musb, ep_num);
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+ else
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+ musb_g_rx(musb, ep_num);
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}
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reg >>= 1;
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@@ -1592,13 +1614,10 @@ irqreturn_t musb_interrupt(struct musb *musb)
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/* musb_ep_select(musb->mregs, ep_num); */
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/* REVISIT just retval |= ep->tx_irq(...) */
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retval = IRQ_HANDLED;
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- if (devctl & MUSB_DEVCTL_HM) {
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- if (is_host_capable())
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- musb_host_tx(musb, ep_num);
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- } else {
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- if (is_peripheral_capable())
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- musb_g_tx(musb, ep_num);
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- }
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+ if (devctl & MUSB_DEVCTL_HM)
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+ musb_host_tx(musb, ep_num);
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+ else
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+ musb_g_tx(musb, ep_num);
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}
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reg >>= 1;
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ep_num++;
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@@ -1634,22 +1653,16 @@ void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit)
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} else {
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/* endpoints 1..15 */
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if (transmit) {
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- if (devctl & MUSB_DEVCTL_HM) {
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- if (is_host_capable())
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- musb_host_tx(musb, epnum);
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- } else {
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- if (is_peripheral_capable())
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- musb_g_tx(musb, epnum);
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- }
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+ if (devctl & MUSB_DEVCTL_HM)
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+ musb_host_tx(musb, epnum);
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+ else
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+ musb_g_tx(musb, epnum);
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} else {
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/* receive */
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- if (devctl & MUSB_DEVCTL_HM) {
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- if (is_host_capable())
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- musb_host_rx(musb, epnum);
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- } else {
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- if (is_peripheral_capable())
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- musb_g_rx(musb, epnum);
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- }
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+ if (devctl & MUSB_DEVCTL_HM)
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+ musb_host_rx(musb, epnum);
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+ else
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+ musb_g_rx(musb, epnum);
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}
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}
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}
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@@ -1785,10 +1798,9 @@ static const struct attribute_group musb_attr_group = {
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static void musb_irq_work(struct work_struct *data)
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{
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struct musb *musb = container_of(data, struct musb, irq_work);
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- static int old_state;
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- if (musb->xceiv->state != old_state) {
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- old_state = musb->xceiv->state;
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+ if (musb->xceiv->state != musb->xceiv_old_state) {
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+ musb->xceiv_old_state = musb->xceiv->state;
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sysfs_notify(&musb->controller->kobj, NULL, "mode");
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}
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}
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@@ -1862,15 +1874,15 @@ static void musb_free(struct musb *musb)
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dma_controller_destroy(c);
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}
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- kfree(musb);
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+ usb_put_hcd(musb_to_hcd(musb));
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}
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/*
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* Perform generic per-controller initialization.
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*
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- * @pDevice: the controller (already clocked, etc)
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- * @nIrq: irq
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- * @mregs: virtual address of controller registers,
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+ * @dev: the controller (already clocked, etc)
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+ * @nIrq: IRQ number
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+ * @ctrl: virtual address of controller registers,
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* not yet corrected for platform-specific offsets
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*/
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static int __devinit
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@@ -1879,6 +1891,7 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
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int status;
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struct musb *musb;
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struct musb_hdrc_platform_data *plat = dev->platform_data;
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+ struct usb_hcd *hcd;
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/* The driver might handle more features than the board; OK.
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* Fail when the board needs a feature that's not enabled.
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@@ -1901,7 +1914,6 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
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pm_runtime_enable(musb->controller);
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spin_lock_init(&musb->lock);
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- musb->board_mode = plat->mode;
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musb->board_set_power = plat->set_power;
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musb->min_power = plat->min_power;
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musb->ops = plat->platform_ops;
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@@ -1972,7 +1984,7 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
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goto fail3;
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}
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musb->nIrq = nIrq;
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-/* FIXME this handles wakeup irqs wrong */
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+ /* FIXME this handles wakeup irqs wrong */
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if (enable_irq_wake(nIrq) == 0) {
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musb->irq_wake = 1;
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device_init_wakeup(dev, 1);
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@@ -1981,58 +1993,25 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
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}
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/* host side needs more setup */
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- if (is_host_enabled(musb)) {
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- struct usb_hcd *hcd = musb_to_hcd(musb);
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-
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- otg_set_host(musb->xceiv->otg, &hcd->self);
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-
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- if (is_otg_enabled(musb))
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- hcd->self.otg_port = 1;
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- musb->xceiv->otg->host = &hcd->self;
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- hcd->power_budget = 2 * (plat->power ? : 250);
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-
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- /* program PHY to use external vBus if required */
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- if (plat->extvbus) {
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- u8 busctl = musb_read_ulpi_buscontrol(musb->mregs);
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- busctl |= MUSB_ULPI_USE_EXTVBUS;
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- musb_write_ulpi_buscontrol(musb->mregs, busctl);
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- }
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+ hcd = musb_to_hcd(musb);
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+ otg_set_host(musb->xceiv->otg, &hcd->self);
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+ hcd->self.otg_port = 1;
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+ musb->xceiv->otg->host = &hcd->self;
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+ hcd->power_budget = 2 * (plat->power ? : 250);
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+
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+ /* program PHY to use external vBus if required */
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+ if (plat->extvbus) {
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+ u8 busctl = musb_read_ulpi_buscontrol(musb->mregs);
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+ busctl |= MUSB_ULPI_USE_EXTVBUS;
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+ musb_write_ulpi_buscontrol(musb->mregs, busctl);
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}
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- /* For the host-only role, we can activate right away.
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- * (We expect the ID pin to be forcibly grounded!!)
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- * Otherwise, wait till the gadget driver hooks up.
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- */
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- if (!is_otg_enabled(musb) && is_host_enabled(musb)) {
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- struct usb_hcd *hcd = musb_to_hcd(musb);
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-
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- MUSB_HST_MODE(musb);
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- musb->xceiv->otg->default_a = 1;
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- musb->xceiv->state = OTG_STATE_A_IDLE;
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-
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- status = usb_add_hcd(musb_to_hcd(musb), 0, 0);
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-
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- hcd->self.uses_pio_for_control = 1;
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- dev_dbg(musb->controller, "%s mode, status %d, devctl %02x %c\n",
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- "HOST", status,
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- musb_readb(musb->mregs, MUSB_DEVCTL),
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- (musb_readb(musb->mregs, MUSB_DEVCTL)
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- & MUSB_DEVCTL_BDEVICE
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- ? 'B' : 'A'));
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-
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- } else /* peripheral is enabled */ {
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- MUSB_DEV_MODE(musb);
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- musb->xceiv->otg->default_a = 0;
|
|
|
- musb->xceiv->state = OTG_STATE_B_IDLE;
|
|
|
-
|
|
|
- status = musb_gadget_setup(musb);
|
|
|
+ MUSB_DEV_MODE(musb);
|
|
|
+ musb->xceiv->otg->default_a = 0;
|
|
|
+ musb->xceiv->state = OTG_STATE_B_IDLE;
|
|
|
|
|
|
- dev_dbg(musb->controller, "%s mode, status %d, dev%02x\n",
|
|
|
- is_otg_enabled(musb) ? "OTG" : "PERIPHERAL",
|
|
|
- status,
|
|
|
- musb_readb(musb->mregs, MUSB_DEVCTL));
|
|
|
+ status = musb_gadget_setup(musb);
|
|
|
|
|
|
- }
|
|
|
if (status < 0)
|
|
|
goto fail3;
|
|
|
|
|
@@ -2048,28 +2027,13 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
|
|
|
|
|
|
pm_runtime_put(musb->controller);
|
|
|
|
|
|
- dev_info(dev, "USB %s mode controller at %p using %s, IRQ %d\n",
|
|
|
- ({char *s;
|
|
|
- switch (musb->board_mode) {
|
|
|
- case MUSB_HOST: s = "Host"; break;
|
|
|
- case MUSB_PERIPHERAL: s = "Peripheral"; break;
|
|
|
- default: s = "OTG"; break;
|
|
|
- }; s; }),
|
|
|
- ctrl,
|
|
|
- (is_dma_capable() && musb->dma_controller)
|
|
|
- ? "DMA" : "PIO",
|
|
|
- musb->nIrq);
|
|
|
-
|
|
|
return 0;
|
|
|
|
|
|
fail5:
|
|
|
musb_exit_debugfs(musb);
|
|
|
|
|
|
fail4:
|
|
|
- if (!is_otg_enabled(musb) && is_host_enabled(musb))
|
|
|
- usb_remove_hcd(musb_to_hcd(musb));
|
|
|
- else
|
|
|
- musb_gadget_cleanup(musb);
|
|
|
+ musb_gadget_cleanup(musb);
|
|
|
|
|
|
fail3:
|
|
|
pm_runtime_put_sync(musb->controller);
|
|
@@ -2096,11 +2060,6 @@ fail0:
|
|
|
/* all implementations (PCI bridge to FPGA, VLYNQ, etc) should just
|
|
|
* bridge to a platform device; this driver then suffices.
|
|
|
*/
|
|
|
-
|
|
|
-#ifndef CONFIG_MUSB_PIO_ONLY
|
|
|
-static u64 *orig_dma_mask;
|
|
|
-#endif
|
|
|
-
|
|
|
static int __devinit musb_probe(struct platform_device *pdev)
|
|
|
{
|
|
|
struct device *dev = &pdev->dev;
|
|
@@ -2119,10 +2078,6 @@ static int __devinit musb_probe(struct platform_device *pdev)
|
|
|
return -ENOMEM;
|
|
|
}
|
|
|
|
|
|
-#ifndef CONFIG_MUSB_PIO_ONLY
|
|
|
- /* clobbered by use_dma=n */
|
|
|
- orig_dma_mask = dev->dma_mask;
|
|
|
-#endif
|
|
|
status = musb_init_controller(dev, irq, base);
|
|
|
if (status < 0)
|
|
|
iounmap(base);
|
|
@@ -2132,7 +2087,8 @@ static int __devinit musb_probe(struct platform_device *pdev)
|
|
|
|
|
|
static int __devexit musb_remove(struct platform_device *pdev)
|
|
|
{
|
|
|
- struct musb *musb = dev_to_musb(&pdev->dev);
|
|
|
+ struct device *dev = &pdev->dev;
|
|
|
+ struct musb *musb = dev_to_musb(dev);
|
|
|
void __iomem *ctrl_base = musb->ctrl_base;
|
|
|
|
|
|
/* this gets called on rmmod.
|
|
@@ -2145,9 +2101,9 @@ static int __devexit musb_remove(struct platform_device *pdev)
|
|
|
|
|
|
musb_free(musb);
|
|
|
iounmap(ctrl_base);
|
|
|
- device_init_wakeup(&pdev->dev, 0);
|
|
|
+ device_init_wakeup(dev, 0);
|
|
|
#ifndef CONFIG_MUSB_PIO_ONLY
|
|
|
- pdev->dev.dma_mask = orig_dma_mask;
|
|
|
+ dma_set_mask(dev, *dev->parent->dma_mask);
|
|
|
#endif
|
|
|
return 0;
|
|
|
}
|
|
@@ -2160,11 +2116,9 @@ static void musb_save_context(struct musb *musb)
|
|
|
void __iomem *musb_base = musb->mregs;
|
|
|
void __iomem *epio;
|
|
|
|
|
|
- if (is_host_enabled(musb)) {
|
|
|
- musb->context.frame = musb_readw(musb_base, MUSB_FRAME);
|
|
|
- musb->context.testmode = musb_readb(musb_base, MUSB_TESTMODE);
|
|
|
- musb->context.busctl = musb_read_ulpi_buscontrol(musb->mregs);
|
|
|
- }
|
|
|
+ musb->context.frame = musb_readw(musb_base, MUSB_FRAME);
|
|
|
+ musb->context.testmode = musb_readb(musb_base, MUSB_TESTMODE);
|
|
|
+ musb->context.busctl = musb_read_ulpi_buscontrol(musb->mregs);
|
|
|
musb->context.power = musb_readb(musb_base, MUSB_POWER);
|
|
|
musb->context.intrtxe = musb_readw(musb_base, MUSB_INTRTXE);
|
|
|
musb->context.intrrxe = musb_readw(musb_base, MUSB_INTRRXE);
|
|
@@ -2203,30 +2157,29 @@ static void musb_save_context(struct musb *musb)
|
|
|
musb->context.index_regs[i].rxfifosz =
|
|
|
musb_read_rxfifosz(musb_base);
|
|
|
}
|
|
|
- if (is_host_enabled(musb)) {
|
|
|
- musb->context.index_regs[i].txtype =
|
|
|
- musb_readb(epio, MUSB_TXTYPE);
|
|
|
- musb->context.index_regs[i].txinterval =
|
|
|
- musb_readb(epio, MUSB_TXINTERVAL);
|
|
|
- musb->context.index_regs[i].rxtype =
|
|
|
- musb_readb(epio, MUSB_RXTYPE);
|
|
|
- musb->context.index_regs[i].rxinterval =
|
|
|
- musb_readb(epio, MUSB_RXINTERVAL);
|
|
|
-
|
|
|
- musb->context.index_regs[i].txfunaddr =
|
|
|
- musb_read_txfunaddr(musb_base, i);
|
|
|
- musb->context.index_regs[i].txhubaddr =
|
|
|
- musb_read_txhubaddr(musb_base, i);
|
|
|
- musb->context.index_regs[i].txhubport =
|
|
|
- musb_read_txhubport(musb_base, i);
|
|
|
-
|
|
|
- musb->context.index_regs[i].rxfunaddr =
|
|
|
- musb_read_rxfunaddr(musb_base, i);
|
|
|
- musb->context.index_regs[i].rxhubaddr =
|
|
|
- musb_read_rxhubaddr(musb_base, i);
|
|
|
- musb->context.index_regs[i].rxhubport =
|
|
|
- musb_read_rxhubport(musb_base, i);
|
|
|
- }
|
|
|
+
|
|
|
+ musb->context.index_regs[i].txtype =
|
|
|
+ musb_readb(epio, MUSB_TXTYPE);
|
|
|
+ musb->context.index_regs[i].txinterval =
|
|
|
+ musb_readb(epio, MUSB_TXINTERVAL);
|
|
|
+ musb->context.index_regs[i].rxtype =
|
|
|
+ musb_readb(epio, MUSB_RXTYPE);
|
|
|
+ musb->context.index_regs[i].rxinterval =
|
|
|
+ musb_readb(epio, MUSB_RXINTERVAL);
|
|
|
+
|
|
|
+ musb->context.index_regs[i].txfunaddr =
|
|
|
+ musb_read_txfunaddr(musb_base, i);
|
|
|
+ musb->context.index_regs[i].txhubaddr =
|
|
|
+ musb_read_txhubaddr(musb_base, i);
|
|
|
+ musb->context.index_regs[i].txhubport =
|
|
|
+ musb_read_txhubport(musb_base, i);
|
|
|
+
|
|
|
+ musb->context.index_regs[i].rxfunaddr =
|
|
|
+ musb_read_rxfunaddr(musb_base, i);
|
|
|
+ musb->context.index_regs[i].rxhubaddr =
|
|
|
+ musb_read_rxhubaddr(musb_base, i);
|
|
|
+ musb->context.index_regs[i].rxhubport =
|
|
|
+ musb_read_rxhubport(musb_base, i);
|
|
|
}
|
|
|
}
|
|
|
|
|
@@ -2237,11 +2190,9 @@ static void musb_restore_context(struct musb *musb)
|
|
|
void __iomem *ep_target_regs;
|
|
|
void __iomem *epio;
|
|
|
|
|
|
- if (is_host_enabled(musb)) {
|
|
|
- musb_writew(musb_base, MUSB_FRAME, musb->context.frame);
|
|
|
- musb_writeb(musb_base, MUSB_TESTMODE, musb->context.testmode);
|
|
|
- musb_write_ulpi_buscontrol(musb->mregs, musb->context.busctl);
|
|
|
- }
|
|
|
+ musb_writew(musb_base, MUSB_FRAME, musb->context.frame);
|
|
|
+ musb_writeb(musb_base, MUSB_TESTMODE, musb->context.testmode);
|
|
|
+ musb_write_ulpi_buscontrol(musb->mregs, musb->context.busctl);
|
|
|
musb_writeb(musb_base, MUSB_POWER, musb->context.power);
|
|
|
musb_writew(musb_base, MUSB_INTRTXE, musb->context.intrtxe);
|
|
|
musb_writew(musb_base, MUSB_INTRRXE, musb->context.intrrxe);
|
|
@@ -2280,33 +2231,31 @@ static void musb_restore_context(struct musb *musb)
|
|
|
musb->context.index_regs[i].rxfifoadd);
|
|
|
}
|
|
|
|
|
|
- if (is_host_enabled(musb)) {
|
|
|
- musb_writeb(epio, MUSB_TXTYPE,
|
|
|
+ musb_writeb(epio, MUSB_TXTYPE,
|
|
|
musb->context.index_regs[i].txtype);
|
|
|
- musb_writeb(epio, MUSB_TXINTERVAL,
|
|
|
+ musb_writeb(epio, MUSB_TXINTERVAL,
|
|
|
musb->context.index_regs[i].txinterval);
|
|
|
- musb_writeb(epio, MUSB_RXTYPE,
|
|
|
+ musb_writeb(epio, MUSB_RXTYPE,
|
|
|
musb->context.index_regs[i].rxtype);
|
|
|
- musb_writeb(epio, MUSB_RXINTERVAL,
|
|
|
+ musb_writeb(epio, MUSB_RXINTERVAL,
|
|
|
|
|
|
- musb->context.index_regs[i].rxinterval);
|
|
|
- musb_write_txfunaddr(musb_base, i,
|
|
|
+ musb->context.index_regs[i].rxinterval);
|
|
|
+ musb_write_txfunaddr(musb_base, i,
|
|
|
musb->context.index_regs[i].txfunaddr);
|
|
|
- musb_write_txhubaddr(musb_base, i,
|
|
|
+ musb_write_txhubaddr(musb_base, i,
|
|
|
musb->context.index_regs[i].txhubaddr);
|
|
|
- musb_write_txhubport(musb_base, i,
|
|
|
+ musb_write_txhubport(musb_base, i,
|
|
|
musb->context.index_regs[i].txhubport);
|
|
|
|
|
|
- ep_target_regs =
|
|
|
- musb_read_target_reg_base(i, musb_base);
|
|
|
+ ep_target_regs =
|
|
|
+ musb_read_target_reg_base(i, musb_base);
|
|
|
|
|
|
- musb_write_rxfunaddr(ep_target_regs,
|
|
|
+ musb_write_rxfunaddr(ep_target_regs,
|
|
|
musb->context.index_regs[i].rxfunaddr);
|
|
|
- musb_write_rxhubaddr(ep_target_regs,
|
|
|
+ musb_write_rxhubaddr(ep_target_regs,
|
|
|
musb->context.index_regs[i].rxhubaddr);
|
|
|
- musb_write_rxhubport(ep_target_regs,
|
|
|
+ musb_write_rxhubport(ep_target_regs,
|
|
|
musb->context.index_regs[i].rxhubport);
|
|
|
- }
|
|
|
}
|
|
|
musb_writeb(musb_base, MUSB_INDEX, musb->context.index);
|
|
|
}
|