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@@ -0,0 +1,1390 @@
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+ Booting the Linux/ppc kernel without Open Firmware
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+ --------------------------------------------------
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+
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+(c) 2005 Benjamin Herrenschmidt <benh at kernel.crashing.org>,
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+ IBM Corp.
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+(c) 2005 Becky Bruce <becky.bruce at freescale.com>,
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+ Freescale Semiconductor, FSL SOC and 32-bit additions
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+(c) 2006 MontaVista Software, Inc.
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+ Flash chip node definition
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+
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+Table of Contents
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+=================
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+
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+ I - Introduction
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+ 1) Entry point for arch/powerpc
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+
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+ II - The DT block format
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+ 1) Header
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+ 2) Device tree generalities
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+ 3) Device tree "structure" block
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+ 4) Device tree "strings" block
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+
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+ III - Required content of the device tree
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+ 1) Note about cells and address representation
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+ 2) Note about "compatible" properties
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+ 3) Note about "name" properties
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+ 4) Note about node and property names and character set
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+ 5) Required nodes and properties
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+ a) The root node
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+ b) The /cpus node
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+ c) The /cpus/* nodes
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+ d) the /memory node(s)
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+ e) The /chosen node
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+ f) the /soc<SOCname> node
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+
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+ IV - "dtc", the device tree compiler
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+
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+ V - Recommendations for a bootloader
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+
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+ VI - System-on-a-chip devices and nodes
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+ 1) Defining child nodes of an SOC
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+ 2) Representing devices without a current OF specification
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+
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+ VII - Specifying interrupt information for devices
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+ 1) interrupts property
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+ 2) interrupt-parent property
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+ 3) OpenPIC Interrupt Controllers
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+ 4) ISA Interrupt Controllers
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+
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+ VIII - Specifying device power management information (sleep property)
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+
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+ Appendix A - Sample SOC node for MPC8540
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+
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+
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+Revision Information
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+====================
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+
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+ May 18, 2005: Rev 0.1 - Initial draft, no chapter III yet.
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+
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+ May 19, 2005: Rev 0.2 - Add chapter III and bits & pieces here or
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+ clarifies the fact that a lot of things are
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+ optional, the kernel only requires a very
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+ small device tree, though it is encouraged
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+ to provide an as complete one as possible.
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+
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+ May 24, 2005: Rev 0.3 - Precise that DT block has to be in RAM
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+ - Misc fixes
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+ - Define version 3 and new format version 16
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+ for the DT block (version 16 needs kernel
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+ patches, will be fwd separately).
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+ String block now has a size, and full path
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+ is replaced by unit name for more
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+ compactness.
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+ linux,phandle is made optional, only nodes
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+ that are referenced by other nodes need it.
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+ "name" property is now automatically
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+ deduced from the unit name
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+
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+ June 1, 2005: Rev 0.4 - Correct confusion between OF_DT_END and
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+ OF_DT_END_NODE in structure definition.
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+ - Change version 16 format to always align
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+ property data to 4 bytes. Since tokens are
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+ already aligned, that means no specific
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+ required alignment between property size
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+ and property data. The old style variable
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+ alignment would make it impossible to do
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+ "simple" insertion of properties using
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+ memmove (thanks Milton for
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+ noticing). Updated kernel patch as well
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+ - Correct a few more alignment constraints
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+ - Add a chapter about the device-tree
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+ compiler and the textural representation of
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+ the tree that can be "compiled" by dtc.
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+
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+ November 21, 2005: Rev 0.5
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+ - Additions/generalizations for 32-bit
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+ - Changed to reflect the new arch/powerpc
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+ structure
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+ - Added chapter VI
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+
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+
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+ ToDo:
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+ - Add some definitions of interrupt tree (simple/complex)
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+ - Add some definitions for PCI host bridges
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+ - Add some common address format examples
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+ - Add definitions for standard properties and "compatible"
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+ names for cells that are not already defined by the existing
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+ OF spec.
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+ - Compare FSL SOC use of PCI to standard and make sure no new
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+ node definition required.
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+ - Add more information about node definitions for SOC devices
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+ that currently have no standard, like the FSL CPM.
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+
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+
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+I - Introduction
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+================
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+
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+During the development of the Linux/ppc64 kernel, and more
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+specifically, the addition of new platform types outside of the old
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+IBM pSeries/iSeries pair, it was decided to enforce some strict rules
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+regarding the kernel entry and bootloader <-> kernel interfaces, in
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+order to avoid the degeneration that had become the ppc32 kernel entry
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+point and the way a new platform should be added to the kernel. The
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+legacy iSeries platform breaks those rules as it predates this scheme,
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+but no new board support will be accepted in the main tree that
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+doesn't follow them properly. In addition, since the advent of the
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+arch/powerpc merged architecture for ppc32 and ppc64, new 32-bit
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+platforms and 32-bit platforms which move into arch/powerpc will be
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+required to use these rules as well.
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+
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+The main requirement that will be defined in more detail below is
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+the presence of a device-tree whose format is defined after Open
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+Firmware specification. However, in order to make life easier
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+to embedded board vendors, the kernel doesn't require the device-tree
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+to represent every device in the system and only requires some nodes
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+and properties to be present. This will be described in detail in
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+section III, but, for example, the kernel does not require you to
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+create a node for every PCI device in the system. It is a requirement
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+to have a node for PCI host bridges in order to provide interrupt
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+routing informations and memory/IO ranges, among others. It is also
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+recommended to define nodes for on chip devices and other buses that
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+don't specifically fit in an existing OF specification. This creates a
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+great flexibility in the way the kernel can then probe those and match
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+drivers to device, without having to hard code all sorts of tables. It
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+also makes it more flexible for board vendors to do minor hardware
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+upgrades without significantly impacting the kernel code or cluttering
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+it with special cases.
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+
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+
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+1) Entry point for arch/powerpc
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+-------------------------------
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+
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+ There is one single entry point to the kernel, at the start
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+ of the kernel image. That entry point supports two calling
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+ conventions:
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+
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+ a) Boot from Open Firmware. If your firmware is compatible
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+ with Open Firmware (IEEE 1275) or provides an OF compatible
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+ client interface API (support for "interpret" callback of
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+ forth words isn't required), you can enter the kernel with:
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+
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+ r5 : OF callback pointer as defined by IEEE 1275
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+ bindings to powerpc. Only the 32-bit client interface
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+ is currently supported
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+
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+ r3, r4 : address & length of an initrd if any or 0
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+
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+ The MMU is either on or off; the kernel will run the
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+ trampoline located in arch/powerpc/kernel/prom_init.c to
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+ extract the device-tree and other information from open
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+ firmware and build a flattened device-tree as described
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+ in b). prom_init() will then re-enter the kernel using
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+ the second method. This trampoline code runs in the
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+ context of the firmware, which is supposed to handle all
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+ exceptions during that time.
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+
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+ b) Direct entry with a flattened device-tree block. This entry
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+ point is called by a) after the OF trampoline and can also be
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+ called directly by a bootloader that does not support the Open
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+ Firmware client interface. It is also used by "kexec" to
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+ implement "hot" booting of a new kernel from a previous
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+ running one. This method is what I will describe in more
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+ details in this document, as method a) is simply standard Open
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+ Firmware, and thus should be implemented according to the
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+ various standard documents defining it and its binding to the
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+ PowerPC platform. The entry point definition then becomes:
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+
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+ r3 : physical pointer to the device-tree block
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+ (defined in chapter II) in RAM
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+
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+ r4 : physical pointer to the kernel itself. This is
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+ used by the assembly code to properly disable the MMU
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+ in case you are entering the kernel with MMU enabled
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+ and a non-1:1 mapping.
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+
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+ r5 : NULL (as to differentiate with method a)
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+
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+ Note about SMP entry: Either your firmware puts your other
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+ CPUs in some sleep loop or spin loop in ROM where you can get
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+ them out via a soft reset or some other means, in which case
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+ you don't need to care, or you'll have to enter the kernel
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+ with all CPUs. The way to do that with method b) will be
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+ described in a later revision of this document.
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+
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+ Board supports (platforms) are not exclusive config options. An
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+ arbitrary set of board supports can be built in a single kernel
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+ image. The kernel will "know" what set of functions to use for a
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+ given platform based on the content of the device-tree. Thus, you
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+ should:
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+
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+ a) add your platform support as a _boolean_ option in
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+ arch/powerpc/Kconfig, following the example of PPC_PSERIES,
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+ PPC_PMAC and PPC_MAPLE. The later is probably a good
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+ example of a board support to start from.
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+
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+ b) create your main platform file as
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+ "arch/powerpc/platforms/myplatform/myboard_setup.c" and add it
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+ to the Makefile under the condition of your CONFIG_
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+ option. This file will define a structure of type "ppc_md"
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+ containing the various callbacks that the generic code will
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+ use to get to your platform specific code
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+
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+ A kernel image may support multiple platforms, but only if the
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+ platforms feature the same core architecture. A single kernel build
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+ cannot support both configurations with Book E and configurations
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+ with classic Powerpc architectures.
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+
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+
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+II - The DT block format
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+========================
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+
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+
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+This chapter defines the actual format of the flattened device-tree
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+passed to the kernel. The actual content of it and kernel requirements
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+are described later. You can find example of code manipulating that
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+format in various places, including arch/powerpc/kernel/prom_init.c
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+which will generate a flattened device-tree from the Open Firmware
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+representation, or the fs2dt utility which is part of the kexec tools
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+which will generate one from a filesystem representation. It is
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+expected that a bootloader like uboot provides a bit more support,
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+that will be discussed later as well.
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+
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+Note: The block has to be in main memory. It has to be accessible in
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+both real mode and virtual mode with no mapping other than main
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+memory. If you are writing a simple flash bootloader, it should copy
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+the block to RAM before passing it to the kernel.
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+
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+
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+1) Header
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+---------
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+
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+ The kernel is passed the physical address pointing to an area of memory
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+ that is roughly described in include/linux/of_fdt.h by the structure
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+ boot_param_header:
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+
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+struct boot_param_header {
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+ u32 magic; /* magic word OF_DT_HEADER */
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+ u32 totalsize; /* total size of DT block */
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+ u32 off_dt_struct; /* offset to structure */
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+ u32 off_dt_strings; /* offset to strings */
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+ u32 off_mem_rsvmap; /* offset to memory reserve map
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+ */
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+ u32 version; /* format version */
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+ u32 last_comp_version; /* last compatible version */
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+
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+ /* version 2 fields below */
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+ u32 boot_cpuid_phys; /* Which physical CPU id we're
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+ booting on */
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+ /* version 3 fields below */
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+ u32 size_dt_strings; /* size of the strings block */
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+
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+ /* version 17 fields below */
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+ u32 size_dt_struct; /* size of the DT structure block */
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+};
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+
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+ Along with the constants:
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+
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+/* Definitions used by the flattened device tree */
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+#define OF_DT_HEADER 0xd00dfeed /* 4: version,
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+ 4: total size */
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+#define OF_DT_BEGIN_NODE 0x1 /* Start node: full name
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+ */
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+#define OF_DT_END_NODE 0x2 /* End node */
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+#define OF_DT_PROP 0x3 /* Property: name off,
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+ size, content */
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+#define OF_DT_END 0x9
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+
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+ All values in this header are in big endian format, the various
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+ fields in this header are defined more precisely below. All
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+ "offset" values are in bytes from the start of the header; that is
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+ from the physical base address of the device tree block.
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+
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+ - magic
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+
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+ This is a magic value that "marks" the beginning of the
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+ device-tree block header. It contains the value 0xd00dfeed and is
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+ defined by the constant OF_DT_HEADER
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+
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+ - totalsize
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+
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+ This is the total size of the DT block including the header. The
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+ "DT" block should enclose all data structures defined in this
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+ chapter (who are pointed to by offsets in this header). That is,
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+ the device-tree structure, strings, and the memory reserve map.
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+
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+ - off_dt_struct
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+
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+ This is an offset from the beginning of the header to the start
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+ of the "structure" part the device tree. (see 2) device tree)
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+
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+ - off_dt_strings
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+
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+ This is an offset from the beginning of the header to the start
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+ of the "strings" part of the device-tree
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+
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+ - off_mem_rsvmap
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+
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+ This is an offset from the beginning of the header to the start
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+ of the reserved memory map. This map is a list of pairs of 64-
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+ bit integers. Each pair is a physical address and a size. The
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+ list is terminated by an entry of size 0. This map provides the
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+ kernel with a list of physical memory areas that are "reserved"
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+ and thus not to be used for memory allocations, especially during
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+ early initialization. The kernel needs to allocate memory during
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+ boot for things like un-flattening the device-tree, allocating an
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+ MMU hash table, etc... Those allocations must be done in such a
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+ way to avoid overriding critical things like, on Open Firmware
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+ capable machines, the RTAS instance, or on some pSeries, the TCE
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+ tables used for the iommu. Typically, the reserve map should
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+ contain _at least_ this DT block itself (header,total_size). If
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+ you are passing an initrd to the kernel, you should reserve it as
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+ well. You do not need to reserve the kernel image itself. The map
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+ should be 64-bit aligned.
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+
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+ - version
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+
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+ This is the version of this structure. Version 1 stops
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+ here. Version 2 adds an additional field boot_cpuid_phys.
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+ Version 3 adds the size of the strings block, allowing the kernel
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+ to reallocate it easily at boot and free up the unused flattened
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+ structure after expansion. Version 16 introduces a new more
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+ "compact" format for the tree itself that is however not backward
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+ compatible. Version 17 adds an additional field, size_dt_struct,
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+ allowing it to be reallocated or moved more easily (this is
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+ particularly useful for bootloaders which need to make
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+ adjustments to a device tree based on probed information). You
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+ should always generate a structure of the highest version defined
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+ at the time of your implementation. Currently that is version 17,
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+ unless you explicitly aim at being backward compatible.
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+
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+ - last_comp_version
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+
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+ Last compatible version. This indicates down to what version of
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+ the DT block you are backward compatible. For example, version 2
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+ is backward compatible with version 1 (that is, a kernel build
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+ for version 1 will be able to boot with a version 2 format). You
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+ should put a 1 in this field if you generate a device tree of
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+ version 1 to 3, or 16 if you generate a tree of version 16 or 17
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+ using the new unit name format.
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+
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+ - boot_cpuid_phys
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+
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+ This field only exist on version 2 headers. It indicate which
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+ physical CPU ID is calling the kernel entry point. This is used,
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+ among others, by kexec. If you are on an SMP system, this value
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+ should match the content of the "reg" property of the CPU node in
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+ the device-tree corresponding to the CPU calling the kernel entry
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+ point (see further chapters for more informations on the required
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+ device-tree contents)
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+
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+ - size_dt_strings
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+
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+ This field only exists on version 3 and later headers. It
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+ gives the size of the "strings" section of the device tree (which
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+ starts at the offset given by off_dt_strings).
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+
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+ - size_dt_struct
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+
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+ This field only exists on version 17 and later headers. It gives
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+ the size of the "structure" section of the device tree (which
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+ starts at the offset given by off_dt_struct).
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+
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+ So the typical layout of a DT block (though the various parts don't
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+ need to be in that order) looks like this (addresses go from top to
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+ bottom):
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+
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+
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+ ------------------------------
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+ base -> | struct boot_param_header |
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+ ------------------------------
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+ | (alignment gap) (*) |
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+ ------------------------------
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+ | memory reserve map |
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+ ------------------------------
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+ | (alignment gap) |
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+ ------------------------------
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+ | |
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+ | device-tree structure |
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+ | |
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+ ------------------------------
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+ | (alignment gap) |
|
|
|
+ ------------------------------
|
|
|
+ | |
|
|
|
+ | device-tree strings |
|
|
|
+ | |
|
|
|
+ -----> ------------------------------
|
|
|
+ |
|
|
|
+ |
|
|
|
+ --- (base + totalsize)
|
|
|
+
|
|
|
+ (*) The alignment gaps are not necessarily present; their presence
|
|
|
+ and size are dependent on the various alignment requirements of
|
|
|
+ the individual data blocks.
|
|
|
+
|
|
|
+
|
|
|
+2) Device tree generalities
|
|
|
+---------------------------
|
|
|
+
|
|
|
+This device-tree itself is separated in two different blocks, a
|
|
|
+structure block and a strings block. Both need to be aligned to a 4
|
|
|
+byte boundary.
|
|
|
+
|
|
|
+First, let's quickly describe the device-tree concept before detailing
|
|
|
+the storage format. This chapter does _not_ describe the detail of the
|
|
|
+required types of nodes & properties for the kernel, this is done
|
|
|
+later in chapter III.
|
|
|
+
|
|
|
+The device-tree layout is strongly inherited from the definition of
|
|
|
+the Open Firmware IEEE 1275 device-tree. It's basically a tree of
|
|
|
+nodes, each node having two or more named properties. A property can
|
|
|
+have a value or not.
|
|
|
+
|
|
|
+It is a tree, so each node has one and only one parent except for the
|
|
|
+root node who has no parent.
|
|
|
+
|
|
|
+A node has 2 names. The actual node name is generally contained in a
|
|
|
+property of type "name" in the node property list whose value is a
|
|
|
+zero terminated string and is mandatory for version 1 to 3 of the
|
|
|
+format definition (as it is in Open Firmware). Version 16 makes it
|
|
|
+optional as it can generate it from the unit name defined below.
|
|
|
+
|
|
|
+There is also a "unit name" that is used to differentiate nodes with
|
|
|
+the same name at the same level, it is usually made of the node
|
|
|
+names, the "@" sign, and a "unit address", which definition is
|
|
|
+specific to the bus type the node sits on.
|
|
|
+
|
|
|
+The unit name doesn't exist as a property per-se but is included in
|
|
|
+the device-tree structure. It is typically used to represent "path" in
|
|
|
+the device-tree. More details about the actual format of these will be
|
|
|
+below.
|
|
|
+
|
|
|
+The kernel generic code does not make any formal use of the
|
|
|
+unit address (though some board support code may do) so the only real
|
|
|
+requirement here for the unit address is to ensure uniqueness of
|
|
|
+the node unit name at a given level of the tree. Nodes with no notion
|
|
|
+of address and no possible sibling of the same name (like /memory or
|
|
|
+/cpus) may omit the unit address in the context of this specification,
|
|
|
+or use the "@0" default unit address. The unit name is used to define
|
|
|
+a node "full path", which is the concatenation of all parent node
|
|
|
+unit names separated with "/".
|
|
|
+
|
|
|
+The root node doesn't have a defined name, and isn't required to have
|
|
|
+a name property either if you are using version 3 or earlier of the
|
|
|
+format. It also has no unit address (no @ symbol followed by a unit
|
|
|
+address). The root node unit name is thus an empty string. The full
|
|
|
+path to the root node is "/".
|
|
|
+
|
|
|
+Every node which actually represents an actual device (that is, a node
|
|
|
+which isn't only a virtual "container" for more nodes, like "/cpus"
|
|
|
+is) is also required to have a "compatible" property indicating the
|
|
|
+specific hardware and an optional list of devices it is fully
|
|
|
+backwards compatible with.
|
|
|
+
|
|
|
+Finally, every node that can be referenced from a property in another
|
|
|
+node is required to have either a "phandle" or a "linux,phandle"
|
|
|
+property. Real Open Firmware implementations provide a unique
|
|
|
+"phandle" value for every node that the "prom_init()" trampoline code
|
|
|
+turns into "linux,phandle" properties. However, this is made optional
|
|
|
+if the flattened device tree is used directly. An example of a node
|
|
|
+referencing another node via "phandle" is when laying out the
|
|
|
+interrupt tree which will be described in a further version of this
|
|
|
+document.
|
|
|
+
|
|
|
+The "phandle" property is a 32-bit value that uniquely
|
|
|
+identifies a node. You are free to use whatever values or system of
|
|
|
+values, internal pointers, or whatever to generate these, the only
|
|
|
+requirement is that every node for which you provide that property has
|
|
|
+a unique value for it.
|
|
|
+
|
|
|
+Here is an example of a simple device-tree. In this example, an "o"
|
|
|
+designates a node followed by the node unit name. Properties are
|
|
|
+presented with their name followed by their content. "content"
|
|
|
+represents an ASCII string (zero terminated) value, while <content>
|
|
|
+represents a 32-bit hexadecimal value. The various nodes in this
|
|
|
+example will be discussed in a later chapter. At this point, it is
|
|
|
+only meant to give you a idea of what a device-tree looks like. I have
|
|
|
+purposefully kept the "name" and "linux,phandle" properties which
|
|
|
+aren't necessary in order to give you a better idea of what the tree
|
|
|
+looks like in practice.
|
|
|
+
|
|
|
+ / o device-tree
|
|
|
+ |- name = "device-tree"
|
|
|
+ |- model = "MyBoardName"
|
|
|
+ |- compatible = "MyBoardFamilyName"
|
|
|
+ |- #address-cells = <2>
|
|
|
+ |- #size-cells = <2>
|
|
|
+ |- linux,phandle = <0>
|
|
|
+ |
|
|
|
+ o cpus
|
|
|
+ | | - name = "cpus"
|
|
|
+ | | - linux,phandle = <1>
|
|
|
+ | | - #address-cells = <1>
|
|
|
+ | | - #size-cells = <0>
|
|
|
+ | |
|
|
|
+ | o PowerPC,970@0
|
|
|
+ | |- name = "PowerPC,970"
|
|
|
+ | |- device_type = "cpu"
|
|
|
+ | |- reg = <0>
|
|
|
+ | |- clock-frequency = <5f5e1000>
|
|
|
+ | |- 64-bit
|
|
|
+ | |- linux,phandle = <2>
|
|
|
+ |
|
|
|
+ o memory@0
|
|
|
+ | |- name = "memory"
|
|
|
+ | |- device_type = "memory"
|
|
|
+ | |- reg = <00000000 00000000 00000000 20000000>
|
|
|
+ | |- linux,phandle = <3>
|
|
|
+ |
|
|
|
+ o chosen
|
|
|
+ |- name = "chosen"
|
|
|
+ |- bootargs = "root=/dev/sda2"
|
|
|
+ |- linux,phandle = <4>
|
|
|
+
|
|
|
+This tree is almost a minimal tree. It pretty much contains the
|
|
|
+minimal set of required nodes and properties to boot a linux kernel;
|
|
|
+that is, some basic model informations at the root, the CPUs, and the
|
|
|
+physical memory layout. It also includes misc information passed
|
|
|
+through /chosen, like in this example, the platform type (mandatory)
|
|
|
+and the kernel command line arguments (optional).
|
|
|
+
|
|
|
+The /cpus/PowerPC,970@0/64-bit property is an example of a
|
|
|
+property without a value. All other properties have a value. The
|
|
|
+significance of the #address-cells and #size-cells properties will be
|
|
|
+explained in chapter IV which defines precisely the required nodes and
|
|
|
+properties and their content.
|
|
|
+
|
|
|
+
|
|
|
+3) Device tree "structure" block
|
|
|
+
|
|
|
+The structure of the device tree is a linearized tree structure. The
|
|
|
+"OF_DT_BEGIN_NODE" token starts a new node, and the "OF_DT_END_NODE"
|
|
|
+ends that node definition. Child nodes are simply defined before
|
|
|
+"OF_DT_END_NODE" (that is nodes within the node). A 'token' is a 32
|
|
|
+bit value. The tree has to be "finished" with a OF_DT_END token
|
|
|
+
|
|
|
+Here's the basic structure of a single node:
|
|
|
+
|
|
|
+ * token OF_DT_BEGIN_NODE (that is 0x00000001)
|
|
|
+ * for version 1 to 3, this is the node full path as a zero
|
|
|
+ terminated string, starting with "/". For version 16 and later,
|
|
|
+ this is the node unit name only (or an empty string for the
|
|
|
+ root node)
|
|
|
+ * [align gap to next 4 bytes boundary]
|
|
|
+ * for each property:
|
|
|
+ * token OF_DT_PROP (that is 0x00000003)
|
|
|
+ * 32-bit value of property value size in bytes (or 0 if no
|
|
|
+ value)
|
|
|
+ * 32-bit value of offset in string block of property name
|
|
|
+ * property value data if any
|
|
|
+ * [align gap to next 4 bytes boundary]
|
|
|
+ * [child nodes if any]
|
|
|
+ * token OF_DT_END_NODE (that is 0x00000002)
|
|
|
+
|
|
|
+So the node content can be summarized as a start token, a full path,
|
|
|
+a list of properties, a list of child nodes, and an end token. Every
|
|
|
+child node is a full node structure itself as defined above.
|
|
|
+
|
|
|
+NOTE: The above definition requires that all property definitions for
|
|
|
+a particular node MUST precede any subnode definitions for that node.
|
|
|
+Although the structure would not be ambiguous if properties and
|
|
|
+subnodes were intermingled, the kernel parser requires that the
|
|
|
+properties come first (up until at least 2.6.22). Any tools
|
|
|
+manipulating a flattened tree must take care to preserve this
|
|
|
+constraint.
|
|
|
+
|
|
|
+4) Device tree "strings" block
|
|
|
+
|
|
|
+In order to save space, property names, which are generally redundant,
|
|
|
+are stored separately in the "strings" block. This block is simply the
|
|
|
+whole bunch of zero terminated strings for all property names
|
|
|
+concatenated together. The device-tree property definitions in the
|
|
|
+structure block will contain offset values from the beginning of the
|
|
|
+strings block.
|
|
|
+
|
|
|
+
|
|
|
+III - Required content of the device tree
|
|
|
+=========================================
|
|
|
+
|
|
|
+WARNING: All "linux,*" properties defined in this document apply only
|
|
|
+to a flattened device-tree. If your platform uses a real
|
|
|
+implementation of Open Firmware or an implementation compatible with
|
|
|
+the Open Firmware client interface, those properties will be created
|
|
|
+by the trampoline code in the kernel's prom_init() file. For example,
|
|
|
+that's where you'll have to add code to detect your board model and
|
|
|
+set the platform number. However, when using the flattened device-tree
|
|
|
+entry point, there is no prom_init() pass, and thus you have to
|
|
|
+provide those properties yourself.
|
|
|
+
|
|
|
+
|
|
|
+1) Note about cells and address representation
|
|
|
+----------------------------------------------
|
|
|
+
|
|
|
+The general rule is documented in the various Open Firmware
|
|
|
+documentations. If you choose to describe a bus with the device-tree
|
|
|
+and there exist an OF bus binding, then you should follow the
|
|
|
+specification. However, the kernel does not require every single
|
|
|
+device or bus to be described by the device tree.
|
|
|
+
|
|
|
+In general, the format of an address for a device is defined by the
|
|
|
+parent bus type, based on the #address-cells and #size-cells
|
|
|
+properties. Note that the parent's parent definitions of #address-cells
|
|
|
+and #size-cells are not inherited so every node with children must specify
|
|
|
+them. The kernel requires the root node to have those properties defining
|
|
|
+addresses format for devices directly mapped on the processor bus.
|
|
|
+
|
|
|
+Those 2 properties define 'cells' for representing an address and a
|
|
|
+size. A "cell" is a 32-bit number. For example, if both contain 2
|
|
|
+like the example tree given above, then an address and a size are both
|
|
|
+composed of 2 cells, and each is a 64-bit number (cells are
|
|
|
+concatenated and expected to be in big endian format). Another example
|
|
|
+is the way Apple firmware defines them, with 2 cells for an address
|
|
|
+and one cell for a size. Most 32-bit implementations should define
|
|
|
+#address-cells and #size-cells to 1, which represents a 32-bit value.
|
|
|
+Some 32-bit processors allow for physical addresses greater than 32
|
|
|
+bits; these processors should define #address-cells as 2.
|
|
|
+
|
|
|
+"reg" properties are always a tuple of the type "address size" where
|
|
|
+the number of cells of address and size is specified by the bus
|
|
|
+#address-cells and #size-cells. When a bus supports various address
|
|
|
+spaces and other flags relative to a given address allocation (like
|
|
|
+prefetchable, etc...) those flags are usually added to the top level
|
|
|
+bits of the physical address. For example, a PCI physical address is
|
|
|
+made of 3 cells, the bottom two containing the actual address itself
|
|
|
+while the top cell contains address space indication, flags, and pci
|
|
|
+bus & device numbers.
|
|
|
+
|
|
|
+For buses that support dynamic allocation, it's the accepted practice
|
|
|
+to then not provide the address in "reg" (keep it 0) though while
|
|
|
+providing a flag indicating the address is dynamically allocated, and
|
|
|
+then, to provide a separate "assigned-addresses" property that
|
|
|
+contains the fully allocated addresses. See the PCI OF bindings for
|
|
|
+details.
|
|
|
+
|
|
|
+In general, a simple bus with no address space bits and no dynamic
|
|
|
+allocation is preferred if it reflects your hardware, as the existing
|
|
|
+kernel address parsing functions will work out of the box. If you
|
|
|
+define a bus type with a more complex address format, including things
|
|
|
+like address space bits, you'll have to add a bus translator to the
|
|
|
+prom_parse.c file of the recent kernels for your bus type.
|
|
|
+
|
|
|
+The "reg" property only defines addresses and sizes (if #size-cells is
|
|
|
+non-0) within a given bus. In order to translate addresses upward
|
|
|
+(that is into parent bus addresses, and possibly into CPU physical
|
|
|
+addresses), all buses must contain a "ranges" property. If the
|
|
|
+"ranges" property is missing at a given level, it's assumed that
|
|
|
+translation isn't possible, i.e., the registers are not visible on the
|
|
|
+parent bus. The format of the "ranges" property for a bus is a list
|
|
|
+of:
|
|
|
+
|
|
|
+ bus address, parent bus address, size
|
|
|
+
|
|
|
+"bus address" is in the format of the bus this bus node is defining,
|
|
|
+that is, for a PCI bridge, it would be a PCI address. Thus, (bus
|
|
|
+address, size) defines a range of addresses for child devices. "parent
|
|
|
+bus address" is in the format of the parent bus of this bus. For
|
|
|
+example, for a PCI host controller, that would be a CPU address. For a
|
|
|
+PCI<->ISA bridge, that would be a PCI address. It defines the base
|
|
|
+address in the parent bus where the beginning of that range is mapped.
|
|
|
+
|
|
|
+For new 64-bit board support, I recommend either the 2/2 format or
|
|
|
+Apple's 2/1 format which is slightly more compact since sizes usually
|
|
|
+fit in a single 32-bit word. New 32-bit board support should use a
|
|
|
+1/1 format, unless the processor supports physical addresses greater
|
|
|
+than 32-bits, in which case a 2/1 format is recommended.
|
|
|
+
|
|
|
+Alternatively, the "ranges" property may be empty, indicating that the
|
|
|
+registers are visible on the parent bus using an identity mapping
|
|
|
+translation. In other words, the parent bus address space is the same
|
|
|
+as the child bus address space.
|
|
|
+
|
|
|
+2) Note about "compatible" properties
|
|
|
+-------------------------------------
|
|
|
+
|
|
|
+These properties are optional, but recommended in devices and the root
|
|
|
+node. The format of a "compatible" property is a list of concatenated
|
|
|
+zero terminated strings. They allow a device to express its
|
|
|
+compatibility with a family of similar devices, in some cases,
|
|
|
+allowing a single driver to match against several devices regardless
|
|
|
+of their actual names.
|
|
|
+
|
|
|
+3) Note about "name" properties
|
|
|
+-------------------------------
|
|
|
+
|
|
|
+While earlier users of Open Firmware like OldWorld macintoshes tended
|
|
|
+to use the actual device name for the "name" property, it's nowadays
|
|
|
+considered a good practice to use a name that is closer to the device
|
|
|
+class (often equal to device_type). For example, nowadays, Ethernet
|
|
|
+controllers are named "ethernet", an additional "model" property
|
|
|
+defining precisely the chip type/model, and "compatible" property
|
|
|
+defining the family in case a single driver can driver more than one
|
|
|
+of these chips. However, the kernel doesn't generally put any
|
|
|
+restriction on the "name" property; it is simply considered good
|
|
|
+practice to follow the standard and its evolutions as closely as
|
|
|
+possible.
|
|
|
+
|
|
|
+Note also that the new format version 16 makes the "name" property
|
|
|
+optional. If it's absent for a node, then the node's unit name is then
|
|
|
+used to reconstruct the name. That is, the part of the unit name
|
|
|
+before the "@" sign is used (or the entire unit name if no "@" sign
|
|
|
+is present).
|
|
|
+
|
|
|
+4) Note about node and property names and character set
|
|
|
+-------------------------------------------------------
|
|
|
+
|
|
|
+While Open Firmware provides more flexible usage of 8859-1, this
|
|
|
+specification enforces more strict rules. Nodes and properties should
|
|
|
+be comprised only of ASCII characters 'a' to 'z', '0' to
|
|
|
+'9', ',', '.', '_', '+', '#', '?', and '-'. Node names additionally
|
|
|
+allow uppercase characters 'A' to 'Z' (property names should be
|
|
|
+lowercase. The fact that vendors like Apple don't respect this rule is
|
|
|
+irrelevant here). Additionally, node and property names should always
|
|
|
+begin with a character in the range 'a' to 'z' (or 'A' to 'Z' for node
|
|
|
+names).
|
|
|
+
|
|
|
+The maximum number of characters for both nodes and property names
|
|
|
+is 31. In the case of node names, this is only the leftmost part of
|
|
|
+a unit name (the pure "name" property), it doesn't include the unit
|
|
|
+address which can extend beyond that limit.
|
|
|
+
|
|
|
+
|
|
|
+5) Required nodes and properties
|
|
|
+--------------------------------
|
|
|
+ These are all that are currently required. However, it is strongly
|
|
|
+ recommended that you expose PCI host bridges as documented in the
|
|
|
+ PCI binding to Open Firmware, and your interrupt tree as documented
|
|
|
+ in OF interrupt tree specification.
|
|
|
+
|
|
|
+ a) The root node
|
|
|
+
|
|
|
+ The root node requires some properties to be present:
|
|
|
+
|
|
|
+ - model : this is your board name/model
|
|
|
+ - #address-cells : address representation for "root" devices
|
|
|
+ - #size-cells: the size representation for "root" devices
|
|
|
+ - compatible : the board "family" generally finds its way here,
|
|
|
+ for example, if you have 2 board models with a similar layout,
|
|
|
+ that typically get driven by the same platform code in the
|
|
|
+ kernel, you would specify the exact board model in the
|
|
|
+ compatible property followed by an entry that represents the SoC
|
|
|
+ model.
|
|
|
+
|
|
|
+ The root node is also generally where you add additional properties
|
|
|
+ specific to your board like the serial number if any, that sort of
|
|
|
+ thing. It is recommended that if you add any "custom" property whose
|
|
|
+ name may clash with standard defined ones, you prefix them with your
|
|
|
+ vendor name and a comma.
|
|
|
+
|
|
|
+ b) The /cpus node
|
|
|
+
|
|
|
+ This node is the parent of all individual CPU nodes. It doesn't
|
|
|
+ have any specific requirements, though it's generally good practice
|
|
|
+ to have at least:
|
|
|
+
|
|
|
+ #address-cells = <00000001>
|
|
|
+ #size-cells = <00000000>
|
|
|
+
|
|
|
+ This defines that the "address" for a CPU is a single cell, and has
|
|
|
+ no meaningful size. This is not necessary but the kernel will assume
|
|
|
+ that format when reading the "reg" properties of a CPU node, see
|
|
|
+ below
|
|
|
+
|
|
|
+ c) The /cpus/* nodes
|
|
|
+
|
|
|
+ So under /cpus, you are supposed to create a node for every CPU on
|
|
|
+ the machine. There is no specific restriction on the name of the
|
|
|
+ CPU, though it's common to call it <architecture>,<core>. For
|
|
|
+ example, Apple uses PowerPC,G5 while IBM uses PowerPC,970FX.
|
|
|
+ However, the Generic Names convention suggests that it would be
|
|
|
+ better to simply use 'cpu' for each cpu node and use the compatible
|
|
|
+ property to identify the specific cpu core.
|
|
|
+
|
|
|
+ Required properties:
|
|
|
+
|
|
|
+ - device_type : has to be "cpu"
|
|
|
+ - reg : This is the physical CPU number, it's a single 32-bit cell
|
|
|
+ and is also used as-is as the unit number for constructing the
|
|
|
+ unit name in the full path. For example, with 2 CPUs, you would
|
|
|
+ have the full path:
|
|
|
+ /cpus/PowerPC,970FX@0
|
|
|
+ /cpus/PowerPC,970FX@1
|
|
|
+ (unit addresses do not require leading zeroes)
|
|
|
+ - d-cache-block-size : one cell, L1 data cache block size in bytes (*)
|
|
|
+ - i-cache-block-size : one cell, L1 instruction cache block size in
|
|
|
+ bytes
|
|
|
+ - d-cache-size : one cell, size of L1 data cache in bytes
|
|
|
+ - i-cache-size : one cell, size of L1 instruction cache in bytes
|
|
|
+
|
|
|
+(*) The cache "block" size is the size on which the cache management
|
|
|
+instructions operate. Historically, this document used the cache
|
|
|
+"line" size here which is incorrect. The kernel will prefer the cache
|
|
|
+block size and will fallback to cache line size for backward
|
|
|
+compatibility.
|
|
|
+
|
|
|
+ Recommended properties:
|
|
|
+
|
|
|
+ - timebase-frequency : a cell indicating the frequency of the
|
|
|
+ timebase in Hz. This is not directly used by the generic code,
|
|
|
+ but you are welcome to copy/paste the pSeries code for setting
|
|
|
+ the kernel timebase/decrementer calibration based on this
|
|
|
+ value.
|
|
|
+ - clock-frequency : a cell indicating the CPU core clock frequency
|
|
|
+ in Hz. A new property will be defined for 64-bit values, but if
|
|
|
+ your frequency is < 4Ghz, one cell is enough. Here as well as
|
|
|
+ for the above, the common code doesn't use that property, but
|
|
|
+ you are welcome to re-use the pSeries or Maple one. A future
|
|
|
+ kernel version might provide a common function for this.
|
|
|
+ - d-cache-line-size : one cell, L1 data cache line size in bytes
|
|
|
+ if different from the block size
|
|
|
+ - i-cache-line-size : one cell, L1 instruction cache line size in
|
|
|
+ bytes if different from the block size
|
|
|
+
|
|
|
+ You are welcome to add any property you find relevant to your board,
|
|
|
+ like some information about the mechanism used to soft-reset the
|
|
|
+ CPUs. For example, Apple puts the GPIO number for CPU soft reset
|
|
|
+ lines in there as a "soft-reset" property since they start secondary
|
|
|
+ CPUs by soft-resetting them.
|
|
|
+
|
|
|
+
|
|
|
+ d) the /memory node(s)
|
|
|
+
|
|
|
+ To define the physical memory layout of your board, you should
|
|
|
+ create one or more memory node(s). You can either create a single
|
|
|
+ node with all memory ranges in its reg property, or you can create
|
|
|
+ several nodes, as you wish. The unit address (@ part) used for the
|
|
|
+ full path is the address of the first range of memory defined by a
|
|
|
+ given node. If you use a single memory node, this will typically be
|
|
|
+ @0.
|
|
|
+
|
|
|
+ Required properties:
|
|
|
+
|
|
|
+ - device_type : has to be "memory"
|
|
|
+ - reg : This property contains all the physical memory ranges of
|
|
|
+ your board. It's a list of addresses/sizes concatenated
|
|
|
+ together, with the number of cells of each defined by the
|
|
|
+ #address-cells and #size-cells of the root node. For example,
|
|
|
+ with both of these properties being 2 like in the example given
|
|
|
+ earlier, a 970 based machine with 6Gb of RAM could typically
|
|
|
+ have a "reg" property here that looks like:
|
|
|
+
|
|
|
+ 00000000 00000000 00000000 80000000
|
|
|
+ 00000001 00000000 00000001 00000000
|
|
|
+
|
|
|
+ That is a range starting at 0 of 0x80000000 bytes and a range
|
|
|
+ starting at 0x100000000 and of 0x100000000 bytes. You can see
|
|
|
+ that there is no memory covering the IO hole between 2Gb and
|
|
|
+ 4Gb. Some vendors prefer splitting those ranges into smaller
|
|
|
+ segments, but the kernel doesn't care.
|
|
|
+
|
|
|
+ e) The /chosen node
|
|
|
+
|
|
|
+ This node is a bit "special". Normally, that's where Open Firmware
|
|
|
+ puts some variable environment information, like the arguments, or
|
|
|
+ the default input/output devices.
|
|
|
+
|
|
|
+ This specification makes a few of these mandatory, but also defines
|
|
|
+ some linux-specific properties that would be normally constructed by
|
|
|
+ the prom_init() trampoline when booting with an OF client interface,
|
|
|
+ but that you have to provide yourself when using the flattened format.
|
|
|
+
|
|
|
+ Recommended properties:
|
|
|
+
|
|
|
+ - bootargs : This zero-terminated string is passed as the kernel
|
|
|
+ command line
|
|
|
+ - linux,stdout-path : This is the full path to your standard
|
|
|
+ console device if any. Typically, if you have serial devices on
|
|
|
+ your board, you may want to put the full path to the one set as
|
|
|
+ the default console in the firmware here, for the kernel to pick
|
|
|
+ it up as its own default console.
|
|
|
+
|
|
|
+ Note that u-boot creates and fills in the chosen node for platforms
|
|
|
+ that use it.
|
|
|
+
|
|
|
+ (Note: a practice that is now obsolete was to include a property
|
|
|
+ under /chosen called interrupt-controller which had a phandle value
|
|
|
+ that pointed to the main interrupt controller)
|
|
|
+
|
|
|
+ f) the /soc<SOCname> node
|
|
|
+
|
|
|
+ This node is used to represent a system-on-a-chip (SoC) and must be
|
|
|
+ present if the processor is a SoC. The top-level soc node contains
|
|
|
+ information that is global to all devices on the SoC. The node name
|
|
|
+ should contain a unit address for the SoC, which is the base address
|
|
|
+ of the memory-mapped register set for the SoC. The name of an SoC
|
|
|
+ node should start with "soc", and the remainder of the name should
|
|
|
+ represent the part number for the soc. For example, the MPC8540's
|
|
|
+ soc node would be called "soc8540".
|
|
|
+
|
|
|
+ Required properties:
|
|
|
+
|
|
|
+ - ranges : Should be defined as specified in 1) to describe the
|
|
|
+ translation of SoC addresses for memory mapped SoC registers.
|
|
|
+ - bus-frequency: Contains the bus frequency for the SoC node.
|
|
|
+ Typically, the value of this field is filled in by the boot
|
|
|
+ loader.
|
|
|
+ - compatible : Exact model of the SoC
|
|
|
+
|
|
|
+
|
|
|
+ Recommended properties:
|
|
|
+
|
|
|
+ - reg : This property defines the address and size of the
|
|
|
+ memory-mapped registers that are used for the SOC node itself.
|
|
|
+ It does not include the child device registers - these will be
|
|
|
+ defined inside each child node. The address specified in the
|
|
|
+ "reg" property should match the unit address of the SOC node.
|
|
|
+ - #address-cells : Address representation for "soc" devices. The
|
|
|
+ format of this field may vary depending on whether or not the
|
|
|
+ device registers are memory mapped. For memory mapped
|
|
|
+ registers, this field represents the number of cells needed to
|
|
|
+ represent the address of the registers. For SOCs that do not
|
|
|
+ use MMIO, a special address format should be defined that
|
|
|
+ contains enough cells to represent the required information.
|
|
|
+ See 1) above for more details on defining #address-cells.
|
|
|
+ - #size-cells : Size representation for "soc" devices
|
|
|
+ - #interrupt-cells : Defines the width of cells used to represent
|
|
|
+ interrupts. Typically this value is <2>, which includes a
|
|
|
+ 32-bit number that represents the interrupt number, and a
|
|
|
+ 32-bit number that represents the interrupt sense and level.
|
|
|
+ This field is only needed if the SOC contains an interrupt
|
|
|
+ controller.
|
|
|
+
|
|
|
+ The SOC node may contain child nodes for each SOC device that the
|
|
|
+ platform uses. Nodes should not be created for devices which exist
|
|
|
+ on the SOC but are not used by a particular platform. See chapter VI
|
|
|
+ for more information on how to specify devices that are part of a SOC.
|
|
|
+
|
|
|
+ Example SOC node for the MPC8540:
|
|
|
+
|
|
|
+ soc8540@e0000000 {
|
|
|
+ #address-cells = <1>;
|
|
|
+ #size-cells = <1>;
|
|
|
+ #interrupt-cells = <2>;
|
|
|
+ device_type = "soc";
|
|
|
+ ranges = <00000000 e0000000 00100000>
|
|
|
+ reg = <e0000000 00003000>;
|
|
|
+ bus-frequency = <0>;
|
|
|
+ }
|
|
|
+
|
|
|
+
|
|
|
+
|
|
|
+IV - "dtc", the device tree compiler
|
|
|
+====================================
|
|
|
+
|
|
|
+
|
|
|
+dtc source code can be found at
|
|
|
+<http://git.jdl.com/gitweb/?p=dtc.git>
|
|
|
+
|
|
|
+WARNING: This version is still in early development stage; the
|
|
|
+resulting device-tree "blobs" have not yet been validated with the
|
|
|
+kernel. The current generated block lacks a useful reserve map (it will
|
|
|
+be fixed to generate an empty one, it's up to the bootloader to fill
|
|
|
+it up) among others. The error handling needs work, bugs are lurking,
|
|
|
+etc...
|
|
|
+
|
|
|
+dtc basically takes a device-tree in a given format and outputs a
|
|
|
+device-tree in another format. The currently supported formats are:
|
|
|
+
|
|
|
+ Input formats:
|
|
|
+ -------------
|
|
|
+
|
|
|
+ - "dtb": "blob" format, that is a flattened device-tree block
|
|
|
+ with
|
|
|
+ header all in a binary blob.
|
|
|
+ - "dts": "source" format. This is a text file containing a
|
|
|
+ "source" for a device-tree. The format is defined later in this
|
|
|
+ chapter.
|
|
|
+ - "fs" format. This is a representation equivalent to the
|
|
|
+ output of /proc/device-tree, that is nodes are directories and
|
|
|
+ properties are files
|
|
|
+
|
|
|
+ Output formats:
|
|
|
+ ---------------
|
|
|
+
|
|
|
+ - "dtb": "blob" format
|
|
|
+ - "dts": "source" format
|
|
|
+ - "asm": assembly language file. This is a file that can be
|
|
|
+ sourced by gas to generate a device-tree "blob". That file can
|
|
|
+ then simply be added to your Makefile. Additionally, the
|
|
|
+ assembly file exports some symbols that can be used.
|
|
|
+
|
|
|
+
|
|
|
+The syntax of the dtc tool is
|
|
|
+
|
|
|
+ dtc [-I <input-format>] [-O <output-format>]
|
|
|
+ [-o output-filename] [-V output_version] input_filename
|
|
|
+
|
|
|
+
|
|
|
+The "output_version" defines what version of the "blob" format will be
|
|
|
+generated. Supported versions are 1,2,3 and 16. The default is
|
|
|
+currently version 3 but that may change in the future to version 16.
|
|
|
+
|
|
|
+Additionally, dtc performs various sanity checks on the tree, like the
|
|
|
+uniqueness of linux, phandle properties, validity of strings, etc...
|
|
|
+
|
|
|
+The format of the .dts "source" file is "C" like, supports C and C++
|
|
|
+style comments.
|
|
|
+
|
|
|
+/ {
|
|
|
+}
|
|
|
+
|
|
|
+The above is the "device-tree" definition. It's the only statement
|
|
|
+supported currently at the toplevel.
|
|
|
+
|
|
|
+/ {
|
|
|
+ property1 = "string_value"; /* define a property containing a 0
|
|
|
+ * terminated string
|
|
|
+ */
|
|
|
+
|
|
|
+ property2 = <1234abcd>; /* define a property containing a
|
|
|
+ * numerical 32-bit value (hexadecimal)
|
|
|
+ */
|
|
|
+
|
|
|
+ property3 = <12345678 12345678 deadbeef>;
|
|
|
+ /* define a property containing 3
|
|
|
+ * numerical 32-bit values (cells) in
|
|
|
+ * hexadecimal
|
|
|
+ */
|
|
|
+ property4 = [0a 0b 0c 0d de ea ad be ef];
|
|
|
+ /* define a property whose content is
|
|
|
+ * an arbitrary array of bytes
|
|
|
+ */
|
|
|
+
|
|
|
+ childnode@address { /* define a child node named "childnode"
|
|
|
+ * whose unit name is "childnode at
|
|
|
+ * address"
|
|
|
+ */
|
|
|
+
|
|
|
+ childprop = "hello\n"; /* define a property "childprop" of
|
|
|
+ * childnode (in this case, a string)
|
|
|
+ */
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+Nodes can contain other nodes etc... thus defining the hierarchical
|
|
|
+structure of the tree.
|
|
|
+
|
|
|
+Strings support common escape sequences from C: "\n", "\t", "\r",
|
|
|
+"\(octal value)", "\x(hex value)".
|
|
|
+
|
|
|
+It is also suggested that you pipe your source file through cpp (gcc
|
|
|
+preprocessor) so you can use #include's, #define for constants, etc...
|
|
|
+
|
|
|
+Finally, various options are planned but not yet implemented, like
|
|
|
+automatic generation of phandles, labels (exported to the asm file so
|
|
|
+you can point to a property content and change it easily from whatever
|
|
|
+you link the device-tree with), label or path instead of numeric value
|
|
|
+in some cells to "point" to a node (replaced by a phandle at compile
|
|
|
+time), export of reserve map address to the asm file, ability to
|
|
|
+specify reserve map content at compile time, etc...
|
|
|
+
|
|
|
+We may provide a .h include file with common definitions of that
|
|
|
+proves useful for some properties (like building PCI properties or
|
|
|
+interrupt maps) though it may be better to add a notion of struct
|
|
|
+definitions to the compiler...
|
|
|
+
|
|
|
+
|
|
|
+V - Recommendations for a bootloader
|
|
|
+====================================
|
|
|
+
|
|
|
+
|
|
|
+Here are some various ideas/recommendations that have been proposed
|
|
|
+while all this has been defined and implemented.
|
|
|
+
|
|
|
+ - The bootloader may want to be able to use the device-tree itself
|
|
|
+ and may want to manipulate it (to add/edit some properties,
|
|
|
+ like physical memory size or kernel arguments). At this point, 2
|
|
|
+ choices can be made. Either the bootloader works directly on the
|
|
|
+ flattened format, or the bootloader has its own internal tree
|
|
|
+ representation with pointers (similar to the kernel one) and
|
|
|
+ re-flattens the tree when booting the kernel. The former is a bit
|
|
|
+ more difficult to edit/modify, the later requires probably a bit
|
|
|
+ more code to handle the tree structure. Note that the structure
|
|
|
+ format has been designed so it's relatively easy to "insert"
|
|
|
+ properties or nodes or delete them by just memmoving things
|
|
|
+ around. It contains no internal offsets or pointers for this
|
|
|
+ purpose.
|
|
|
+
|
|
|
+ - An example of code for iterating nodes & retrieving properties
|
|
|
+ directly from the flattened tree format can be found in the kernel
|
|
|
+ file drivers/of/fdt.c. Look at the of_scan_flat_dt() function,
|
|
|
+ its usage in early_init_devtree(), and the corresponding various
|
|
|
+ early_init_dt_scan_*() callbacks. That code can be re-used in a
|
|
|
+ GPL bootloader, and as the author of that code, I would be happy
|
|
|
+ to discuss possible free licensing to any vendor who wishes to
|
|
|
+ integrate all or part of this code into a non-GPL bootloader.
|
|
|
+ (reference needed; who is 'I' here? ---gcl Jan 31, 2011)
|
|
|
+
|
|
|
+
|
|
|
+
|
|
|
+VI - System-on-a-chip devices and nodes
|
|
|
+=======================================
|
|
|
+
|
|
|
+Many companies are now starting to develop system-on-a-chip
|
|
|
+processors, where the processor core (CPU) and many peripheral devices
|
|
|
+exist on a single piece of silicon. For these SOCs, an SOC node
|
|
|
+should be used that defines child nodes for the devices that make
|
|
|
+up the SOC. While platforms are not required to use this model in
|
|
|
+order to boot the kernel, it is highly encouraged that all SOC
|
|
|
+implementations define as complete a flat-device-tree as possible to
|
|
|
+describe the devices on the SOC. This will allow for the
|
|
|
+genericization of much of the kernel code.
|
|
|
+
|
|
|
+
|
|
|
+1) Defining child nodes of an SOC
|
|
|
+---------------------------------
|
|
|
+
|
|
|
+Each device that is part of an SOC may have its own node entry inside
|
|
|
+the SOC node. For each device that is included in the SOC, the unit
|
|
|
+address property represents the address offset for this device's
|
|
|
+memory-mapped registers in the parent's address space. The parent's
|
|
|
+address space is defined by the "ranges" property in the top-level soc
|
|
|
+node. The "reg" property for each node that exists directly under the
|
|
|
+SOC node should contain the address mapping from the child address space
|
|
|
+to the parent SOC address space and the size of the device's
|
|
|
+memory-mapped register file.
|
|
|
+
|
|
|
+For many devices that may exist inside an SOC, there are predefined
|
|
|
+specifications for the format of the device tree node. All SOC child
|
|
|
+nodes should follow these specifications, except where noted in this
|
|
|
+document.
|
|
|
+
|
|
|
+See appendix A for an example partial SOC node definition for the
|
|
|
+MPC8540.
|
|
|
+
|
|
|
+
|
|
|
+2) Representing devices without a current OF specification
|
|
|
+----------------------------------------------------------
|
|
|
+
|
|
|
+Currently, there are many devices on SoCs that do not have a standard
|
|
|
+representation defined as part of the Open Firmware specifications,
|
|
|
+mainly because the boards that contain these SoCs are not currently
|
|
|
+booted using Open Firmware. Binding documentation for new devices
|
|
|
+should be added to the Documentation/devicetree/bindings directory.
|
|
|
+That directory will expand as device tree support is added to more and
|
|
|
+more SoCs.
|
|
|
+
|
|
|
+
|
|
|
+VII - Specifying interrupt information for devices
|
|
|
+===================================================
|
|
|
+
|
|
|
+The device tree represents the buses and devices of a hardware
|
|
|
+system in a form similar to the physical bus topology of the
|
|
|
+hardware.
|
|
|
+
|
|
|
+In addition, a logical 'interrupt tree' exists which represents the
|
|
|
+hierarchy and routing of interrupts in the hardware.
|
|
|
+
|
|
|
+The interrupt tree model is fully described in the
|
|
|
+document "Open Firmware Recommended Practice: Interrupt
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+Mapping Version 0.9". The document is available at:
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+<http://playground.sun.com/1275/practice>.
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+
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+1) interrupts property
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+----------------------
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+
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+Devices that generate interrupts to a single interrupt controller
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+should use the conventional OF representation described in the
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+OF interrupt mapping documentation.
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+
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+Each device which generates interrupts must have an 'interrupt'
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+property. The interrupt property value is an arbitrary number of
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+of 'interrupt specifier' values which describe the interrupt or
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+interrupts for the device.
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+
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+The encoding of an interrupt specifier is determined by the
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+interrupt domain in which the device is located in the
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+interrupt tree. The root of an interrupt domain specifies in
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+its #interrupt-cells property the number of 32-bit cells
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+required to encode an interrupt specifier. See the OF interrupt
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+mapping documentation for a detailed description of domains.
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+
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+For example, the binding for the OpenPIC interrupt controller
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+specifies an #interrupt-cells value of 2 to encode the interrupt
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+number and level/sense information. All interrupt children in an
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+OpenPIC interrupt domain use 2 cells per interrupt in their interrupts
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+property.
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+
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+The PCI bus binding specifies a #interrupt-cell value of 1 to encode
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+which interrupt pin (INTA,INTB,INTC,INTD) is used.
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+
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+2) interrupt-parent property
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+----------------------------
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+
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+The interrupt-parent property is specified to define an explicit
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+link between a device node and its interrupt parent in
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+the interrupt tree. The value of interrupt-parent is the
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+phandle of the parent node.
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+
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+If the interrupt-parent property is not defined for a node, its
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+interrupt parent is assumed to be an ancestor in the node's
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+_device tree_ hierarchy.
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+
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+3) OpenPIC Interrupt Controllers
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+--------------------------------
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+
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+OpenPIC interrupt controllers require 2 cells to encode
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+interrupt information. The first cell defines the interrupt
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+number. The second cell defines the sense and level
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+information.
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+
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+Sense and level information should be encoded as follows:
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+
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+ 0 = low to high edge sensitive type enabled
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+ 1 = active low level sensitive type enabled
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+ 2 = active high level sensitive type enabled
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+ 3 = high to low edge sensitive type enabled
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+
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+4) ISA Interrupt Controllers
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+----------------------------
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+
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+ISA PIC interrupt controllers require 2 cells to encode
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+interrupt information. The first cell defines the interrupt
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+number. The second cell defines the sense and level
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+information.
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+
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+ISA PIC interrupt controllers should adhere to the ISA PIC
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+encodings listed below:
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+
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+ 0 = active low level sensitive type enabled
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+ 1 = active high level sensitive type enabled
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+ 2 = high to low edge sensitive type enabled
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+ 3 = low to high edge sensitive type enabled
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+
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+VIII - Specifying Device Power Management Information (sleep property)
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+===================================================================
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+
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+Devices on SOCs often have mechanisms for placing devices into low-power
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+states that are decoupled from the devices' own register blocks. Sometimes,
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+this information is more complicated than a cell-index property can
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+reasonably describe. Thus, each device controlled in such a manner
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+may contain a "sleep" property which describes these connections.
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+
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+The sleep property consists of one or more sleep resources, each of
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+which consists of a phandle to a sleep controller, followed by a
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+controller-specific sleep specifier of zero or more cells.
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+
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+The semantics of what type of low power modes are possible are defined
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+by the sleep controller. Some examples of the types of low power modes
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+that may be supported are:
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+
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+ - Dynamic: The device may be disabled or enabled at any time.
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+ - System Suspend: The device may request to be disabled or remain
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+ awake during system suspend, but will not be disabled until then.
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+ - Permanent: The device is disabled permanently (until the next hard
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+ reset).
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+
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+Some devices may share a clock domain with each other, such that they should
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+only be suspended when none of the devices are in use. Where reasonable,
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+such nodes should be placed on a virtual bus, where the bus has the sleep
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+property. If the clock domain is shared among devices that cannot be
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+reasonably grouped in this manner, then create a virtual sleep controller
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+(similar to an interrupt nexus, except that defining a standardized
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+sleep-map should wait until its necessity is demonstrated).
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+
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+Appendix A - Sample SOC node for MPC8540
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+========================================
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+
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+ soc@e0000000 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "fsl,mpc8540-ccsr", "simple-bus";
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+ device_type = "soc";
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+ ranges = <0x00000000 0xe0000000 0x00100000>
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+ bus-frequency = <0>;
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+ interrupt-parent = <&pic>;
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+
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+ ethernet@24000 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ device_type = "network";
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+ model = "TSEC";
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+ compatible = "gianfar", "simple-bus";
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+ reg = <0x24000 0x1000>;
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+ local-mac-address = [ 00 E0 0C 00 73 00 ];
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+ interrupts = <29 2 30 2 34 2>;
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+ phy-handle = <&phy0>;
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+ sleep = <&pmc 00000080>;
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+ ranges;
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+
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+ mdio@24520 {
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+ reg = <0x24520 0x20>;
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+ compatible = "fsl,gianfar-mdio";
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+
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+ phy0: ethernet-phy@0 {
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+ interrupts = <5 1>;
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+ reg = <0>;
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+ device_type = "ethernet-phy";
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+ };
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+
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+ phy1: ethernet-phy@1 {
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+ interrupts = <5 1>;
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+ reg = <1>;
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+ device_type = "ethernet-phy";
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+ };
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+
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+ phy3: ethernet-phy@3 {
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+ interrupts = <7 1>;
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+ reg = <3>;
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+ device_type = "ethernet-phy";
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+ };
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+ };
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+ };
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+
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+ ethernet@25000 {
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+ device_type = "network";
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+ model = "TSEC";
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+ compatible = "gianfar";
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+ reg = <0x25000 0x1000>;
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+ local-mac-address = [ 00 E0 0C 00 73 01 ];
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+ interrupts = <13 2 14 2 18 2>;
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+ phy-handle = <&phy1>;
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+ sleep = <&pmc 00000040>;
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+ };
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+
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+ ethernet@26000 {
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+ device_type = "network";
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+ model = "FEC";
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+ compatible = "gianfar";
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+ reg = <0x26000 0x1000>;
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+ local-mac-address = [ 00 E0 0C 00 73 02 ];
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+ interrupts = <41 2>;
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+ phy-handle = <&phy3>;
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+ sleep = <&pmc 00000020>;
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+ };
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+
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+ serial@4500 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "fsl,mpc8540-duart", "simple-bus";
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+ sleep = <&pmc 00000002>;
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+ ranges;
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+
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+ serial@4500 {
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+ device_type = "serial";
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+ compatible = "ns16550";
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+ reg = <0x4500 0x100>;
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+ clock-frequency = <0>;
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+ interrupts = <42 2>;
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+ };
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+
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+ serial@4600 {
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+ device_type = "serial";
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+ compatible = "ns16550";
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+ reg = <0x4600 0x100>;
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+ clock-frequency = <0>;
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+ interrupts = <42 2>;
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+ };
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+ };
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+
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+ pic: pic@40000 {
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+ interrupt-controller;
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+ #address-cells = <0>;
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+ #interrupt-cells = <2>;
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+ reg = <0x40000 0x40000>;
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+ compatible = "chrp,open-pic";
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+ device_type = "open-pic";
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+ };
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+
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+ i2c@3000 {
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+ interrupts = <43 2>;
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+ reg = <0x3000 0x100>;
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+ compatible = "fsl-i2c";
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+ dfsrr;
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+ sleep = <&pmc 00000004>;
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+ };
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+
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+ pmc: power@e0070 {
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+ compatible = "fsl,mpc8540-pmc", "fsl,mpc8548-pmc";
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+ reg = <0xe0070 0x20>;
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+ };
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+ };
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James Morris