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@@ -3618,9 +3618,7 @@ static int tg3_load_tso_firmware(struct tg3 *tp)
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unsigned long cpu_base, cpu_scratch_base, cpu_scratch_size;
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int err, i;
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- if (tg3_flag(tp, HW_TSO_1) ||
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- tg3_flag(tp, HW_TSO_2) ||
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- tg3_flag(tp, HW_TSO_3))
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+ if (!tg3_flag(tp, FW_TSO))
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return 0;
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fw_data = (void *)tp->fw->data;
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@@ -15293,7 +15291,8 @@ static int tg3_get_invariants(struct tg3 *tp, const struct pci_device_id *ent)
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} else if (tg3_asic_rev(tp) != ASIC_REV_5700 &&
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tg3_asic_rev(tp) != ASIC_REV_5701 &&
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tg3_chip_rev_id(tp) != CHIPREV_ID_5705_A0) {
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- tg3_flag_set(tp, TSO_BUG);
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+ tg3_flag_set(tp, FW_TSO);
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+ tg3_flag_set(tp, TSO_BUG);
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if (tg3_asic_rev(tp) == ASIC_REV_5705)
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tp->fw_needed = FIRMWARE_TG3TSO5;
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else
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@@ -15304,7 +15303,7 @@ static int tg3_get_invariants(struct tg3 *tp, const struct pci_device_id *ent)
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if (tg3_flag(tp, HW_TSO_1) ||
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tg3_flag(tp, HW_TSO_2) ||
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tg3_flag(tp, HW_TSO_3) ||
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- tp->fw_needed) {
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+ tg3_flag(tp, FW_TSO)) {
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/* For firmware TSO, assume ASF is disabled.
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* We'll disable TSO later if we discover ASF
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* is enabled in tg3_get_eeprom_hw_cfg().
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@@ -15591,7 +15590,7 @@ static int tg3_get_invariants(struct tg3 *tp, const struct pci_device_id *ent)
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*/
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tg3_get_eeprom_hw_cfg(tp);
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- if (tp->fw_needed && tg3_flag(tp, ENABLE_ASF)) {
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+ if (tg3_flag(tp, FW_TSO) && tg3_flag(tp, ENABLE_ASF)) {
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tg3_flag_clear(tp, TSO_CAPABLE);
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tg3_flag_clear(tp, TSO_BUG);
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tp->fw_needed = NULL;
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