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@@ -95,6 +95,17 @@ static bool is_pch_edp(struct intel_dp *intel_dp)
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return intel_dp->is_pch_edp;
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}
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+/**
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+ * is_cpu_edp - is the port on the CPU and attached to an eDP panel?
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+ * @intel_dp: DP struct
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+ *
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+ * Returns true if the given DP struct corresponds to a CPU eDP port.
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+ */
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+static bool is_cpu_edp(struct intel_dp *intel_dp)
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+{
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+ return is_edp(intel_dp) && !is_pch_edp(intel_dp);
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+}
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+
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static struct intel_dp *enc_to_intel_dp(struct drm_encoder *encoder)
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{
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return container_of(encoder, struct intel_dp, base.base);
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@@ -355,7 +366,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
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* Note that PCH attached eDP panels should use a 125MHz input
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* clock divider.
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*/
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- if (is_edp(intel_dp) && !is_pch_edp(intel_dp)) {
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+ if (is_cpu_edp(intel_dp)) {
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if (IS_GEN6(dev))
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aux_clock_divider = 200; /* SNB eDP input clock at 400Mhz */
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else
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@@ -859,7 +870,7 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
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if (intel_crtc->pipe == 1 && !HAS_PCH_CPT(dev))
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intel_dp->DP |= DP_PIPEB_SELECT;
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- if (is_edp(intel_dp) && !is_pch_edp(intel_dp)) {
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+ if (is_cpu_edp(intel_dp)) {
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/* don't miss out required setting for eDP */
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intel_dp->DP |= DP_PLL_ENABLE;
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if (adjusted_mode->clock < 200000)
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