|
@@ -1600,7 +1600,6 @@ static int wm8962_put_hp_sw(struct snd_kcontrol *kcontrol,
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
{
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
- u16 *reg_cache = codec->reg_cache;
|
|
|
int ret;
|
|
|
|
|
|
/* Apply the update (if any) */
|
|
@@ -1609,16 +1608,19 @@ static int wm8962_put_hp_sw(struct snd_kcontrol *kcontrol,
|
|
|
return 0;
|
|
|
|
|
|
/* If the left PGA is enabled hit that VU bit... */
|
|
|
- if (snd_soc_read(codec, WM8962_PWR_MGMT_2) & WM8962_HPOUTL_PGA_ENA)
|
|
|
- return snd_soc_write(codec, WM8962_HPOUTL_VOLUME,
|
|
|
- reg_cache[WM8962_HPOUTL_VOLUME]);
|
|
|
+ ret = snd_soc_read(codec, WM8962_PWR_MGMT_2);
|
|
|
+ if (ret & WM8962_HPOUTL_PGA_ENA) {
|
|
|
+ snd_soc_write(codec, WM8962_HPOUTL_VOLUME,
|
|
|
+ snd_soc_read(codec, WM8962_HPOUTL_VOLUME));
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
|
|
|
/* ...otherwise the right. The VU is stereo. */
|
|
|
- if (snd_soc_read(codec, WM8962_PWR_MGMT_2) & WM8962_HPOUTR_PGA_ENA)
|
|
|
- return snd_soc_write(codec, WM8962_HPOUTR_VOLUME,
|
|
|
- reg_cache[WM8962_HPOUTR_VOLUME]);
|
|
|
+ if (ret & WM8962_HPOUTR_PGA_ENA)
|
|
|
+ snd_soc_write(codec, WM8962_HPOUTR_VOLUME,
|
|
|
+ snd_soc_read(codec, WM8962_HPOUTR_VOLUME));
|
|
|
|
|
|
- return 0;
|
|
|
+ return 1;
|
|
|
}
|
|
|
|
|
|
/* The VU bits for the speakers are in a different register to the mute
|
|
@@ -3374,7 +3376,6 @@ static int wm8962_probe(struct snd_soc_codec *codec)
|
|
|
int ret;
|
|
|
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
|
|
|
struct wm8962_pdata *pdata = dev_get_platdata(codec->dev);
|
|
|
- u16 *reg_cache = codec->reg_cache;
|
|
|
int i, trigger, irq_pol;
|
|
|
bool dmicclk, dmicdat;
|
|
|
|
|
@@ -3432,8 +3433,9 @@ static int wm8962_probe(struct snd_soc_codec *codec)
|
|
|
|
|
|
/* Put the speakers into mono mode? */
|
|
|
if (pdata->spk_mono)
|
|
|
- reg_cache[WM8962_CLASS_D_CONTROL_2]
|
|
|
- |= WM8962_SPK_MONO;
|
|
|
+ snd_soc_update_bits(codec, WM8962_CLASS_D_CONTROL_2,
|
|
|
+ WM8962_SPK_MONO_MASK, WM8962_SPK_MONO);
|
|
|
+
|
|
|
|
|
|
/* Micbias setup, detection enable and detection
|
|
|
* threasholds. */
|
|
@@ -3721,6 +3723,17 @@ static int wm8962_runtime_resume(struct device *dev)
|
|
|
|
|
|
regcache_sync(wm8962->regmap);
|
|
|
|
|
|
+ regmap_update_bits(wm8962->regmap, WM8962_ANTI_POP,
|
|
|
+ WM8962_STARTUP_BIAS_ENA | WM8962_VMID_BUF_ENA,
|
|
|
+ WM8962_STARTUP_BIAS_ENA | WM8962_VMID_BUF_ENA);
|
|
|
+
|
|
|
+ /* Bias enable at 2*5k (fast start-up) */
|
|
|
+ regmap_update_bits(wm8962->regmap, WM8962_PWR_MGMT_1,
|
|
|
+ WM8962_BIAS_ENA | WM8962_VMID_SEL_MASK,
|
|
|
+ WM8962_BIAS_ENA | 0x180);
|
|
|
+
|
|
|
+ msleep(5);
|
|
|
+
|
|
|
return 0;
|
|
|
}
|
|
|
|