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@@ -756,8 +756,10 @@ static int gpio_irq_type(unsigned irq, unsigned type)
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spin_lock_irqsave(&bank->lock, flags);
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spin_lock_irqsave(&bank->lock, flags);
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retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
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retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
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if (retval == 0) {
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if (retval == 0) {
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- irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
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- irq_desc[irq].status |= type;
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+ struct irq_desc *d = irq_to_desc(irq);
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+
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+ d->status &= ~IRQ_TYPE_SENSE_MASK;
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+ d->status |= type;
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}
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}
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spin_unlock_irqrestore(&bank->lock, flags);
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spin_unlock_irqrestore(&bank->lock, flags);
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@@ -1671,7 +1673,9 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank)
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for (j = bank->virtual_irq_start;
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for (j = bank->virtual_irq_start;
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j < bank->virtual_irq_start + bank_width; j++) {
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j < bank->virtual_irq_start + bank_width; j++) {
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- lockdep_set_class(&irq_desc[j].lock, &gpio_lock_class);
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+ struct irq_desc *d = irq_to_desc(j);
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+
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+ lockdep_set_class(&d->lock, &gpio_lock_class);
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set_irq_chip_data(j, bank);
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set_irq_chip_data(j, bank);
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if (bank_is_mpuio(bank))
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if (bank_is_mpuio(bank))
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set_irq_chip(j, &mpuio_irq_chip);
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set_irq_chip(j, &mpuio_irq_chip);
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