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+/*
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+ * linux/arch/arm/mach-omap2/gpmc-smc91x.c
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+ *
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+ * Copyright (C) 2009 Nokia Corporation
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+ * Contact: Tony Lindgren
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/platform_device.h>
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+#include <linux/gpio.h>
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+#include <linux/delay.h>
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+#include <linux/interrupt.h>
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+#include <linux/io.h>
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+#include <linux/smc91x.h>
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+
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+#include <mach/board.h>
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+#include <mach/gpmc.h>
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+#include <mach/gpmc-smc91x.h>
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+
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+static struct omap_smc91x_platform_data *gpmc_cfg;
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+
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+static struct resource gpmc_smc91x_resources[] = {
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+ [0] = {
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct smc91x_platdata gpmc_smc91x_info = {
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+ .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_IO_SHIFT_0,
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+};
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+
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+static struct platform_device gpmc_smc91x_device = {
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+ .name = "smc91x",
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+ .id = -1,
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+ .num_resources = ARRAY_SIZE(gpmc_smc91x_resources),
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+ .resource = gpmc_smc91x_resources,
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+ .dev = {
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+ .platform_data = &gpmc_smc91x_info,
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+ },
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+};
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+
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+/*
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+ * Set the gpmc timings for smc91c96. The timings are taken
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+ * from the data sheet available at:
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+ * http://www.smsc.com/main/catalog/lan91c96.html
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+ * REVISIT: Level shifters can add at least to the access latency.
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+ */
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+static int smc91c96_gpmc_retime(void)
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+{
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+ struct gpmc_timings t;
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+ const int t3 = 10; /* Figure 12.2 read and 12.4 write */
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+ const int t4_r = 20; /* Figure 12.2 read */
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+ const int t4_w = 5; /* Figure 12.4 write */
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+ const int t5 = 25; /* Figure 12.2 read */
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+ const int t6 = 15; /* Figure 12.2 read */
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+ const int t7 = 5; /* Figure 12.4 write */
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+ const int t8 = 5; /* Figure 12.4 write */
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+ const int t20 = 185; /* Figure 12.2 read and 12.4 write */
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+ u32 l;
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+
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+ memset(&t, 0, sizeof(t));
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+
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+ /* Read timings */
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+ t.cs_on = 0;
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+ t.adv_on = t.cs_on;
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+ t.oe_on = t.adv_on + t3;
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+ t.access = t.oe_on + t5;
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+ t.oe_off = t.access;
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+ t.adv_rd_off = t.oe_off + max(t4_r, t6);
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+ t.cs_rd_off = t.oe_off;
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+ t.rd_cycle = t20 - t.oe_on;
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+
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+ /* Write timings */
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+ t.we_on = t.adv_on + t3;
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+
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+ if (cpu_is_omap34xx() && (gpmc_cfg->flags & GPMC_MUX_ADD_DATA)) {
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+ t.wr_data_mux_bus = t.we_on;
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+ t.we_off = t.wr_data_mux_bus + t7;
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+ } else
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+ t.we_off = t.we_on + t7;
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+ if (cpu_is_omap34xx())
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+ t.wr_access = t.we_off;
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+ t.adv_wr_off = t.we_off + max(t4_w, t8);
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+ t.cs_wr_off = t.we_off + t4_w;
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+ t.wr_cycle = t20 - t.we_on;
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+
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+ l = GPMC_CONFIG1_DEVICESIZE_16;
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+ if (gpmc_cfg->flags & GPMC_MUX_ADD_DATA)
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+ l |= GPMC_CONFIG1_MUXADDDATA;
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+ if (gpmc_cfg->flags & GPMC_READ_MON)
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+ l |= GPMC_CONFIG1_WAIT_READ_MON;
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+ if (gpmc_cfg->flags & GPMC_WRITE_MON)
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+ l |= GPMC_CONFIG1_WAIT_WRITE_MON;
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+ if (gpmc_cfg->wait_pin)
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+ l |= GPMC_CONFIG1_WAIT_PIN_SEL(gpmc_cfg->wait_pin);
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+ gpmc_cs_write_reg(gpmc_cfg->cs, GPMC_CS_CONFIG1, l);
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+
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+ /*
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+ * FIXME: Calculate the address and data bus muxed timings.
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+ * Note that at least adv_rd_off needs to be changed according
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+ * to omap3430 TRM Figure 11-11. Are the sdp boards using the
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+ * FPGA in between smc91x and omap as the timings are different
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+ * from above?
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+ */
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+ if (gpmc_cfg->flags & GPMC_MUX_ADD_DATA)
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+ return 0;
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+
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+ return gpmc_cs_set_timings(gpmc_cfg->cs, &t);
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+}
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+
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+/*
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+ * Initialize smc91x device connected to the GPMC. Note that we
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+ * assume that pin multiplexing is done in the board-*.c file,
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+ * or in the bootloader.
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+ */
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+void __init gpmc_smc91x_init(struct omap_smc91x_platform_data *board_data)
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+{
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+ unsigned long cs_mem_base;
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+ int ret;
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+
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+ gpmc_cfg = board_data;
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+
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+ if (gpmc_cfg->flags & GPMC_TIMINGS_SMC91C96)
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+ gpmc_cfg->retime = smc91c96_gpmc_retime;
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+
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+ if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
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+ printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
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+ return;
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+ }
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+
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+ gpmc_smc91x_resources[0].start = cs_mem_base + 0x300;
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+ gpmc_smc91x_resources[0].end = cs_mem_base + 0x30f;
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+ gpmc_smc91x_resources[1].flags |= (gpmc_cfg->flags & IRQF_TRIGGER_MASK);
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+
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+ if (gpmc_cfg->retime) {
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+ ret = gpmc_cfg->retime();
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+ if (ret != 0)
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+ goto free1;
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+ }
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+
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+ if (gpio_request(gpmc_cfg->gpio_irq, "SMC91X irq") < 0)
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+ goto free1;
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+
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+ gpio_direction_input(gpmc_cfg->gpio_irq);
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+ gpmc_smc91x_resources[1].start = gpio_to_irq(gpmc_cfg->gpio_irq);
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+
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+ if (gpmc_cfg->gpio_pwrdwn) {
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+ ret = gpio_request(gpmc_cfg->gpio_pwrdwn, "SMC91X powerdown");
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+ if (ret)
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+ goto free2;
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+ gpio_direction_output(gpmc_cfg->gpio_pwrdwn, 0);
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+ }
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+
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+ if (gpmc_cfg->gpio_reset) {
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+ ret = gpio_request(gpmc_cfg->gpio_reset, "SMC91X reset");
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+ if (ret)
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+ goto free3;
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+
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+ gpio_direction_output(gpmc_cfg->gpio_reset, 0);
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+ gpio_set_value(gpmc_cfg->gpio_reset, 1);
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+ msleep(100);
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+ gpio_set_value(gpmc_cfg->gpio_reset, 0);
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+ }
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+
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+ if (platform_device_register(&gpmc_smc91x_device) < 0) {
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+ printk(KERN_ERR "Unable to register smc91x device\n");
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+ gpio_free(gpmc_cfg->gpio_reset);
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+ goto free3;
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+ }
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+
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+ return;
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+
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+free3:
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+ if (gpmc_cfg->gpio_pwrdwn)
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+ gpio_free(gpmc_cfg->gpio_pwrdwn);
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+free2:
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+ gpio_free(gpmc_cfg->gpio_irq);
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+free1:
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+ gpmc_cs_free(gpmc_cfg->cs);
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+
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+ printk(KERN_ERR "Could not initialize smc91x\n");
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+}
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