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@@ -92,7 +92,7 @@ static unsigned native_patch(u8 type, u16 clobbers, void *insns, unsigned len)
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return insn_len;
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}
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-static fastcall unsigned long native_get_debugreg(int regno)
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+static unsigned long native_get_debugreg(int regno)
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{
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unsigned long val = 0; /* Damn you, gcc! */
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@@ -115,7 +115,7 @@ static fastcall unsigned long native_get_debugreg(int regno)
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return val;
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}
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-static fastcall void native_set_debugreg(int regno, unsigned long value)
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+static void native_set_debugreg(int regno, unsigned long value)
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{
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switch (regno) {
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case 0:
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@@ -146,55 +146,55 @@ void init_IRQ(void)
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paravirt_ops.init_IRQ();
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}
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-static fastcall void native_clts(void)
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+static void native_clts(void)
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{
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asm volatile ("clts");
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}
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-static fastcall unsigned long native_read_cr0(void)
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+static unsigned long native_read_cr0(void)
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{
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unsigned long val;
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asm volatile("movl %%cr0,%0\n\t" :"=r" (val));
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return val;
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}
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-static fastcall void native_write_cr0(unsigned long val)
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+static void native_write_cr0(unsigned long val)
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{
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asm volatile("movl %0,%%cr0": :"r" (val));
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}
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-static fastcall unsigned long native_read_cr2(void)
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+static unsigned long native_read_cr2(void)
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{
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unsigned long val;
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asm volatile("movl %%cr2,%0\n\t" :"=r" (val));
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return val;
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}
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-static fastcall void native_write_cr2(unsigned long val)
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+static void native_write_cr2(unsigned long val)
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{
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asm volatile("movl %0,%%cr2": :"r" (val));
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}
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-static fastcall unsigned long native_read_cr3(void)
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+static unsigned long native_read_cr3(void)
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{
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unsigned long val;
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asm volatile("movl %%cr3,%0\n\t" :"=r" (val));
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return val;
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}
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-static fastcall void native_write_cr3(unsigned long val)
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+static void native_write_cr3(unsigned long val)
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{
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asm volatile("movl %0,%%cr3": :"r" (val));
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}
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-static fastcall unsigned long native_read_cr4(void)
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+static unsigned long native_read_cr4(void)
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{
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unsigned long val;
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asm volatile("movl %%cr4,%0\n\t" :"=r" (val));
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return val;
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}
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-static fastcall unsigned long native_read_cr4_safe(void)
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+static unsigned long native_read_cr4_safe(void)
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{
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unsigned long val;
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/* This could fault if %cr4 does not exist */
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@@ -207,51 +207,51 @@ static fastcall unsigned long native_read_cr4_safe(void)
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return val;
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}
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-static fastcall void native_write_cr4(unsigned long val)
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+static void native_write_cr4(unsigned long val)
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{
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asm volatile("movl %0,%%cr4": :"r" (val));
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}
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-static fastcall unsigned long native_save_fl(void)
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+static unsigned long native_save_fl(void)
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{
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unsigned long f;
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asm volatile("pushfl ; popl %0":"=g" (f): /* no input */);
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return f;
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}
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-static fastcall void native_restore_fl(unsigned long f)
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+static void native_restore_fl(unsigned long f)
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{
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asm volatile("pushl %0 ; popfl": /* no output */
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:"g" (f)
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:"memory", "cc");
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}
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-static fastcall void native_irq_disable(void)
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+static void native_irq_disable(void)
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{
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asm volatile("cli": : :"memory");
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}
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-static fastcall void native_irq_enable(void)
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+static void native_irq_enable(void)
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{
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asm volatile("sti": : :"memory");
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}
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-static fastcall void native_safe_halt(void)
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+static void native_safe_halt(void)
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{
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asm volatile("sti; hlt": : :"memory");
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}
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-static fastcall void native_halt(void)
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+static void native_halt(void)
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{
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asm volatile("hlt": : :"memory");
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}
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-static fastcall void native_wbinvd(void)
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+static void native_wbinvd(void)
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{
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asm volatile("wbinvd": : :"memory");
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}
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-static fastcall unsigned long long native_read_msr(unsigned int msr, int *err)
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+static unsigned long long native_read_msr(unsigned int msr, int *err)
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{
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unsigned long long val;
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@@ -270,7 +270,7 @@ static fastcall unsigned long long native_read_msr(unsigned int msr, int *err)
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return val;
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}
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-static fastcall int native_write_msr(unsigned int msr, unsigned long long val)
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+static int native_write_msr(unsigned int msr, unsigned long long val)
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{
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int err;
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asm volatile("2: wrmsr ; xorl %0,%0\n"
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@@ -288,53 +288,53 @@ static fastcall int native_write_msr(unsigned int msr, unsigned long long val)
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return err;
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}
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-static fastcall unsigned long long native_read_tsc(void)
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+static unsigned long long native_read_tsc(void)
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{
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unsigned long long val;
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asm volatile("rdtsc" : "=A" (val));
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return val;
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}
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-static fastcall unsigned long long native_read_pmc(void)
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+static unsigned long long native_read_pmc(void)
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{
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unsigned long long val;
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asm volatile("rdpmc" : "=A" (val));
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return val;
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}
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-static fastcall void native_load_tr_desc(void)
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+static void native_load_tr_desc(void)
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{
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asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8));
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}
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-static fastcall void native_load_gdt(const struct Xgt_desc_struct *dtr)
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+static void native_load_gdt(const struct Xgt_desc_struct *dtr)
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{
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asm volatile("lgdt %0"::"m" (*dtr));
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}
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-static fastcall void native_load_idt(const struct Xgt_desc_struct *dtr)
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+static void native_load_idt(const struct Xgt_desc_struct *dtr)
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{
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asm volatile("lidt %0"::"m" (*dtr));
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}
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-static fastcall void native_store_gdt(struct Xgt_desc_struct *dtr)
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+static void native_store_gdt(struct Xgt_desc_struct *dtr)
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{
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asm ("sgdt %0":"=m" (*dtr));
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}
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-static fastcall void native_store_idt(struct Xgt_desc_struct *dtr)
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+static void native_store_idt(struct Xgt_desc_struct *dtr)
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{
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asm ("sidt %0":"=m" (*dtr));
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}
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-static fastcall unsigned long native_store_tr(void)
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+static unsigned long native_store_tr(void)
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{
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unsigned long tr;
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asm ("str %0":"=r" (tr));
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return tr;
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}
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-static fastcall void native_load_tls(struct thread_struct *t, unsigned int cpu)
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+static void native_load_tls(struct thread_struct *t, unsigned int cpu)
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{
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#define C(i) get_cpu_gdt_table(cpu)[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i]
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C(0); C(1); C(2);
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@@ -348,22 +348,22 @@ static inline void native_write_dt_entry(void *dt, int entry, u32 entry_low, u32
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lp[1] = entry_high;
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}
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-static fastcall void native_write_ldt_entry(void *dt, int entrynum, u32 low, u32 high)
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+static void native_write_ldt_entry(void *dt, int entrynum, u32 low, u32 high)
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{
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native_write_dt_entry(dt, entrynum, low, high);
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}
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-static fastcall void native_write_gdt_entry(void *dt, int entrynum, u32 low, u32 high)
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+static void native_write_gdt_entry(void *dt, int entrynum, u32 low, u32 high)
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{
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native_write_dt_entry(dt, entrynum, low, high);
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}
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-static fastcall void native_write_idt_entry(void *dt, int entrynum, u32 low, u32 high)
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+static void native_write_idt_entry(void *dt, int entrynum, u32 low, u32 high)
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{
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native_write_dt_entry(dt, entrynum, low, high);
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}
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-static fastcall void native_load_esp0(struct tss_struct *tss,
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+static void native_load_esp0(struct tss_struct *tss,
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struct thread_struct *thread)
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{
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tss->esp0 = thread->esp0;
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@@ -375,12 +375,12 @@ static fastcall void native_load_esp0(struct tss_struct *tss,
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}
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}
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-static fastcall void native_io_delay(void)
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+static void native_io_delay(void)
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{
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asm volatile("outb %al,$0x80");
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}
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-static fastcall void native_flush_tlb(void)
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+static void native_flush_tlb(void)
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{
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__native_flush_tlb();
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}
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@@ -389,49 +389,49 @@ static fastcall void native_flush_tlb(void)
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* Global pages have to be flushed a bit differently. Not a real
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* performance problem because this does not happen often.
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*/
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-static fastcall void native_flush_tlb_global(void)
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+static void native_flush_tlb_global(void)
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{
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__native_flush_tlb_global();
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}
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-static fastcall void native_flush_tlb_single(u32 addr)
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+static void native_flush_tlb_single(u32 addr)
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{
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__native_flush_tlb_single(addr);
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}
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#ifndef CONFIG_X86_PAE
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-static fastcall void native_set_pte(pte_t *ptep, pte_t pteval)
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+static void native_set_pte(pte_t *ptep, pte_t pteval)
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{
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*ptep = pteval;
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}
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-static fastcall void native_set_pte_at(struct mm_struct *mm, u32 addr, pte_t *ptep, pte_t pteval)
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+static void native_set_pte_at(struct mm_struct *mm, u32 addr, pte_t *ptep, pte_t pteval)
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{
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*ptep = pteval;
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}
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-static fastcall void native_set_pmd(pmd_t *pmdp, pmd_t pmdval)
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+static void native_set_pmd(pmd_t *pmdp, pmd_t pmdval)
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{
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*pmdp = pmdval;
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}
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#else /* CONFIG_X86_PAE */
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-static fastcall void native_set_pte(pte_t *ptep, pte_t pte)
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+static void native_set_pte(pte_t *ptep, pte_t pte)
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{
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ptep->pte_high = pte.pte_high;
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smp_wmb();
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ptep->pte_low = pte.pte_low;
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}
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-static fastcall void native_set_pte_at(struct mm_struct *mm, u32 addr, pte_t *ptep, pte_t pte)
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+static void native_set_pte_at(struct mm_struct *mm, u32 addr, pte_t *ptep, pte_t pte)
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{
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ptep->pte_high = pte.pte_high;
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smp_wmb();
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ptep->pte_low = pte.pte_low;
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}
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-static fastcall void native_set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
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+static void native_set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
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{
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ptep->pte_low = 0;
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smp_wmb();
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@@ -440,29 +440,29 @@ static fastcall void native_set_pte_present(struct mm_struct *mm, unsigned long
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ptep->pte_low = pte.pte_low;
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}
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-static fastcall void native_set_pte_atomic(pte_t *ptep, pte_t pteval)
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+static void native_set_pte_atomic(pte_t *ptep, pte_t pteval)
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{
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set_64bit((unsigned long long *)ptep,pte_val(pteval));
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}
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-static fastcall void native_set_pmd(pmd_t *pmdp, pmd_t pmdval)
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+static void native_set_pmd(pmd_t *pmdp, pmd_t pmdval)
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{
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set_64bit((unsigned long long *)pmdp,pmd_val(pmdval));
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}
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-static fastcall void native_set_pud(pud_t *pudp, pud_t pudval)
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+static void native_set_pud(pud_t *pudp, pud_t pudval)
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{
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*pudp = pudval;
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}
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-static fastcall void native_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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+static void native_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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{
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ptep->pte_low = 0;
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smp_wmb();
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ptep->pte_high = 0;
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}
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-static fastcall void native_pmd_clear(pmd_t *pmd)
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+static void native_pmd_clear(pmd_t *pmd)
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{
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u32 *tmp = (u32 *)pmd;
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*tmp = 0;
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@@ -472,8 +472,8 @@ static fastcall void native_pmd_clear(pmd_t *pmd)
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#endif /* CONFIG_X86_PAE */
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/* These are in entry.S */
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-extern fastcall void native_iret(void);
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-extern fastcall void native_irq_enable_sysexit(void);
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+extern void native_iret(void);
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+extern void native_irq_enable_sysexit(void);
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static int __init print_banner(void)
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{
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