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+/*
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+ * linux/arch/arm/mach-at91rm9200/at91sam926x_time.c
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+ *
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+ * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France
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+ * Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#include <linux/init.h>
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+#include <linux/interrupt.h>
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+#include <linux/irq.h>
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+#include <linux/kernel.h>
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+#include <linux/sched.h>
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+#include <linux/time.h>
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+
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+#include <asm/hardware.h>
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+#include <asm/io.h>
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+#include <asm/mach/time.h>
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+
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+#include <asm/arch/at91_pit.h>
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+
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+
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+#define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
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+#define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20)
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+
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+/*
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+ * Returns number of microseconds since last timer interrupt. Note that interrupts
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+ * will have been disabled by do_gettimeofday()
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+ * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
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+ * 'tick' is usecs per jiffy (linux/timex.h).
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+ */
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+static unsigned long at91sam926x_gettimeoffset(void)
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+{
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+ unsigned long elapsed;
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+ unsigned long t = at91_sys_read(AT91_PIT_PIIR);
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+
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+ elapsed = (PIT_PICNT(t) * LATCH) + PIT_CPIV(t); /* hardware clock cycles */
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+
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+ return (unsigned long)(elapsed * 1000000) / LATCH;
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+}
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+
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+/*
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+ * IRQ handler for the timer.
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+ */
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+static irqreturn_t at91sam926x_timer_interrupt(int irq, void *dev_id)
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+{
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+ volatile long nr_ticks;
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+
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+ if (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS) { /* This is a shared interrupt */
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+ write_seqlock(&xtime_lock);
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+
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+ /* Get number to ticks performed before interrupt and clear PIT interrupt */
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+ nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
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+ do {
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+ timer_tick();
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+ nr_ticks--;
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+ } while (nr_ticks);
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+
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+ write_sequnlock(&xtime_lock);
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+ return IRQ_HANDLED;
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+ } else
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+ return IRQ_NONE; /* not handled */
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+}
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+
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+static struct irqaction at91sam926x_timer_irq = {
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+ .name = "at91_tick",
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+ .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER,
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+ .handler = at91sam926x_timer_interrupt
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+};
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+
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+void at91sam926x_timer_reset(void)
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+{
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+ /* Disable timer */
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+ at91_sys_write(AT91_PIT_MR, 0);
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+
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+ /* Clear any pending interrupts */
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+ (void) at91_sys_read(AT91_PIT_PIVR);
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+
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+ /* Set Period Interval timer and enable its interrupt */
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+ at91_sys_write(AT91_PIT_MR, (LATCH & AT91_PIT_PIV) | AT91_PIT_PITIEN | AT91_PIT_PITEN);
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+}
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+
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+/*
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+ * Set up timer interrupt.
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+ */
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+void __init at91sam926x_timer_init(void)
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+{
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+ /* Initialize and enable the timer */
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+ at91sam926x_timer_reset();
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+
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+ /* Make IRQs happen for the system timer. */
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+ setup_irq(AT91_ID_SYS, &at91sam926x_timer_irq);
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+}
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+
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+#ifdef CONFIG_PM
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+static void at91sam926x_timer_suspend(void)
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+{
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+ /* Disable timer */
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+ at91_sys_write(AT91_PIT_MR, 0);
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+}
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+#else
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+#define at91sam926x_timer_suspend NULL
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+#endif
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+
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+struct sys_timer at91sam926x_timer = {
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+ .init = at91sam926x_timer_init,
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+ .offset = at91sam926x_gettimeoffset,
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+ .suspend = at91sam926x_timer_suspend,
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+ .resume = at91sam926x_timer_reset,
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+};
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+
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