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@@ -44,7 +44,7 @@
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/*
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- * Xilinx calls it "PLB TFT LCD Controller" though it can also be used for
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+ * Xilinx calls it "TFT LCD Controller" though it can also be used for
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* the VGA port on the Xilinx ML40x board. This is a hardware display
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* controller for a 640x480 resolution TFT or VGA screen.
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*
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@@ -54,11 +54,11 @@
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* don't start thinking about scrolling). The second allows the LCD to
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* be turned on or off as well as rotated 180 degrees.
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*
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- * In case of direct PLB access the second control register will be at
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+ * In case of direct BUS access the second control register will be at
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* an offset of 4 as compared to the DCR access where the offset is 1
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* i.e. REG_CTRL. So this is taken care in the function
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- * xilinx_fb_out_be32 where it left shifts the offset 2 times in case of
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- * direct PLB access.
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+ * xilinx_fb_out32 where it left shifts the offset 2 times in case of
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+ * direct BUS access.
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*/
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#define NUM_REGS 2
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#define REG_FB_ADDR 0
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@@ -116,7 +116,8 @@ static struct fb_var_screeninfo xilinx_fb_var = {
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};
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-#define PLB_ACCESS_FLAG 0x1 /* 1 = PLB, 0 = DCR */
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+#define BUS_ACCESS_FLAG 0x1 /* 1 = BUS, 0 = DCR */
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+#define LITTLE_ENDIAN_ACCESS 0x2 /* LITTLE ENDIAN IO functions */
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struct xilinxfb_drvdata {
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@@ -146,21 +147,40 @@ struct xilinxfb_drvdata {
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container_of(_info, struct xilinxfb_drvdata, info)
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/*
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- * The XPS TFT Controller can be accessed through PLB or DCR interface.
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+ * The XPS TFT Controller can be accessed through BUS or DCR interface.
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* To perform the read/write on the registers we need to check on
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* which bus its connected and call the appropriate write API.
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*/
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-static void xilinx_fb_out_be32(struct xilinxfb_drvdata *drvdata, u32 offset,
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+static void xilinx_fb_out32(struct xilinxfb_drvdata *drvdata, u32 offset,
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u32 val)
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{
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- if (drvdata->flags & PLB_ACCESS_FLAG)
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- out_be32(drvdata->regs + (offset << 2), val);
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+ if (drvdata->flags & BUS_ACCESS_FLAG) {
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+ if (drvdata->flags & LITTLE_ENDIAN_ACCESS)
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+ iowrite32(val, drvdata->regs + (offset << 2));
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+ else
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+ iowrite32be(val, drvdata->regs + (offset << 2));
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+ }
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#ifdef CONFIG_PPC_DCR
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else
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dcr_write(drvdata->dcr_host, offset, val);
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#endif
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}
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+static u32 xilinx_fb_in32(struct xilinxfb_drvdata *drvdata, u32 offset)
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+{
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+ if (drvdata->flags & BUS_ACCESS_FLAG) {
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+ if (drvdata->flags & LITTLE_ENDIAN_ACCESS)
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+ return ioread32(drvdata->regs + (offset << 2));
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+ else
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+ return ioread32be(drvdata->regs + (offset << 2));
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+ }
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+#ifdef CONFIG_PPC_DCR
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+ else
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+ return dcr_read(drvdata->dcr_host, offset);
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+#endif
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+ return 0;
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+}
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+
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static int
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xilinx_fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
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unsigned transp, struct fb_info *fbi)
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@@ -197,7 +217,7 @@ xilinx_fb_blank(int blank_mode, struct fb_info *fbi)
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switch (blank_mode) {
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case FB_BLANK_UNBLANK:
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/* turn on panel */
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- xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
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+ xilinx_fb_out32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
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break;
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case FB_BLANK_NORMAL:
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@@ -205,7 +225,7 @@ xilinx_fb_blank(int blank_mode, struct fb_info *fbi)
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case FB_BLANK_HSYNC_SUSPEND:
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case FB_BLANK_POWERDOWN:
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/* turn off panel */
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- xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
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+ xilinx_fb_out32(drvdata, REG_CTRL, 0);
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default:
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break;
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@@ -227,33 +247,23 @@ static struct fb_ops xilinxfb_ops =
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* Bus independent setup/teardown
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*/
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-static int xilinxfb_assign(struct device *dev,
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+static int xilinxfb_assign(struct platform_device *pdev,
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struct xilinxfb_drvdata *drvdata,
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- unsigned long physaddr,
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struct xilinxfb_platform_data *pdata)
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{
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int rc;
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+ struct device *dev = &pdev->dev;
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int fbsize = pdata->xvirt * pdata->yvirt * BYTES_PER_PIXEL;
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- if (drvdata->flags & PLB_ACCESS_FLAG) {
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- /*
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- * Map the control registers in if the controller
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- * is on direct PLB interface.
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- */
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- if (!request_mem_region(physaddr, 8, DRIVER_NAME)) {
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- dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
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- physaddr);
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- rc = -ENODEV;
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- goto err_region;
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- }
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+ if (drvdata->flags & BUS_ACCESS_FLAG) {
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+ struct resource *res;
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- drvdata->regs_phys = physaddr;
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- drvdata->regs = ioremap(physaddr, 8);
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ drvdata->regs_phys = res->start;
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+ drvdata->regs = devm_request_and_ioremap(&pdev->dev, res);
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if (!drvdata->regs) {
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- dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
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- physaddr);
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- rc = -ENODEV;
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- goto err_map;
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+ rc = -EADDRNOTAVAIL;
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+ goto err_region;
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}
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}
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@@ -270,7 +280,7 @@ static int xilinxfb_assign(struct device *dev,
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if (!drvdata->fb_virt) {
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dev_err(dev, "Could not allocate frame buffer memory\n");
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rc = -ENOMEM;
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- if (drvdata->flags & PLB_ACCESS_FLAG)
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+ if (drvdata->flags & BUS_ACCESS_FLAG)
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goto err_fbmem;
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else
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goto err_region;
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@@ -280,13 +290,19 @@ static int xilinxfb_assign(struct device *dev,
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memset_io((void __iomem *)drvdata->fb_virt, 0, fbsize);
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/* Tell the hardware where the frame buffer is */
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- xilinx_fb_out_be32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
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+ xilinx_fb_out32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
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+ rc = xilinx_fb_in32(drvdata, REG_FB_ADDR);
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+ /* Endianess detection */
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+ if (rc != drvdata->fb_phys) {
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+ drvdata->flags |= LITTLE_ENDIAN_ACCESS;
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+ xilinx_fb_out32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
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+ }
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/* Turn on the display */
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drvdata->reg_ctrl_default = REG_CTRL_ENABLE;
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if (pdata->rotate_screen)
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drvdata->reg_ctrl_default |= REG_CTRL_ROTATE;
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- xilinx_fb_out_be32(drvdata, REG_CTRL,
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+ xilinx_fb_out32(drvdata, REG_CTRL,
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drvdata->reg_ctrl_default);
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/* Fill struct fb_info */
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@@ -323,9 +339,9 @@ static int xilinxfb_assign(struct device *dev,
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goto err_regfb;
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}
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- if (drvdata->flags & PLB_ACCESS_FLAG) {
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+ if (drvdata->flags & BUS_ACCESS_FLAG) {
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/* Put a banner in the log (for DEBUG) */
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- dev_dbg(dev, "regs: phys=%lx, virt=%p\n", physaddr,
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+ dev_dbg(dev, "regs: phys=%x, virt=%p\n", drvdata->regs_phys,
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drvdata->regs);
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}
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/* Put a banner in the log (for DEBUG) */
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@@ -345,15 +361,11 @@ err_cmap:
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iounmap(drvdata->fb_virt);
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/* Turn off the display */
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- xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
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+ xilinx_fb_out32(drvdata, REG_CTRL, 0);
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err_fbmem:
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- if (drvdata->flags & PLB_ACCESS_FLAG)
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- iounmap(drvdata->regs);
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-
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-err_map:
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- if (drvdata->flags & PLB_ACCESS_FLAG)
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- release_mem_region(physaddr, 8);
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+ if (drvdata->flags & BUS_ACCESS_FLAG)
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+ devm_iounmap(dev, drvdata->regs);
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err_region:
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kfree(drvdata);
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@@ -381,13 +393,11 @@ static int xilinxfb_release(struct device *dev)
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iounmap(drvdata->fb_virt);
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/* Turn off the display */
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- xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
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+ xilinx_fb_out32(drvdata, REG_CTRL, 0);
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/* Release the resources, as allocated based on interface */
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- if (drvdata->flags & PLB_ACCESS_FLAG) {
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- iounmap(drvdata->regs);
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- release_mem_region(drvdata->regs_phys, 8);
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- }
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+ if (drvdata->flags & BUS_ACCESS_FLAG)
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+ devm_iounmap(dev, drvdata->regs);
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#ifdef CONFIG_PPC_DCR
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else
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dcr_unmap(drvdata->dcr_host, drvdata->dcr_len);
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@@ -406,11 +416,9 @@ static int xilinxfb_release(struct device *dev)
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static int xilinxfb_of_probe(struct platform_device *op)
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{
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const u32 *prop;
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- u32 *p;
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- u32 tft_access;
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+ u32 tft_access = 0;
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struct xilinxfb_platform_data pdata;
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- struct resource res;
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- int size, rc;
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+ int size;
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struct xilinxfb_drvdata *drvdata;
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/* Copy with the default pdata (not a ptr reference!) */
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@@ -424,34 +432,29 @@ static int xilinxfb_of_probe(struct platform_device *op)
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}
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/*
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- * To check whether the core is connected directly to DCR or PLB
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+ * To check whether the core is connected directly to DCR or BUS
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* interface and initialize the tft_access accordingly.
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*/
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- p = (u32 *)of_get_property(op->dev.of_node, "xlnx,dcr-splb-slave-if", NULL);
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- tft_access = p ? *p : 0;
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+ of_property_read_u32(op->dev.of_node, "xlnx,dcr-splb-slave-if",
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+ &tft_access);
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/*
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- * Fill the resource structure if its direct PLB interface
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+ * Fill the resource structure if its direct BUS interface
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* otherwise fill the dcr_host structure.
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*/
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if (tft_access) {
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- drvdata->flags |= PLB_ACCESS_FLAG;
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- rc = of_address_to_resource(op->dev.of_node, 0, &res);
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- if (rc) {
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- dev_err(&op->dev, "invalid address\n");
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- goto err;
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- }
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+ drvdata->flags |= BUS_ACCESS_FLAG;
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}
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#ifdef CONFIG_PPC_DCR
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else {
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int start;
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- res.start = 0;
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start = dcr_resource_start(op->dev.of_node, 0);
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drvdata->dcr_len = dcr_resource_len(op->dev.of_node, 0);
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drvdata->dcr_host = dcr_map(op->dev.of_node, start, drvdata->dcr_len);
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if (!DCR_MAP_OK(drvdata->dcr_host)) {
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dev_err(&op->dev, "invalid DCR address\n");
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- goto err;
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+ kfree(drvdata);
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+ return -ENODEV;
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}
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}
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#endif
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@@ -478,11 +481,7 @@ static int xilinxfb_of_probe(struct platform_device *op)
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pdata.rotate_screen = 1;
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dev_set_drvdata(&op->dev, drvdata);
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- return xilinxfb_assign(&op->dev, drvdata, res.start, &pdata);
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-
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- err:
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- kfree(drvdata);
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- return -ENODEV;
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+ return xilinxfb_assign(op, drvdata, &pdata);
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}
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static int xilinxfb_of_remove(struct platform_device *op)
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Jean-Christophe PLAGNIOL-VILLARD