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@@ -16,6 +16,7 @@
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <asm/msr.h>
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#include <asm/msr.h>
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+#include <asm/tsc.h>
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#include "speedstep-lib.h"
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#include "speedstep-lib.h"
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#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
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#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
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@@ -178,6 +179,15 @@ static unsigned int pentium4_get_frequency(void)
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u32 msr_lo, msr_hi, mult;
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u32 msr_lo, msr_hi, mult;
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unsigned int fsb = 0;
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unsigned int fsb = 0;
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unsigned int ret;
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unsigned int ret;
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+ u8 fsb_code;
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+
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+ /* Pentium 4 Model 0 and 1 do not have the Core Clock Frequency
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+ * to System Bus Frequency Ratio Field in the Processor Frequency
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+ * Configuration Register of the MSR. Therefore the current
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+ * frequency cannot be calculated and has to be measured.
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+ */
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+ if (c->x86_model < 2)
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+ return cpu_khz;
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rdmsr(0x2c, msr_lo, msr_hi);
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rdmsr(0x2c, msr_lo, msr_hi);
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@@ -188,21 +198,17 @@ static unsigned int pentium4_get_frequency(void)
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* revision #12 in Table B-1: MSRs in the Pentium 4 and
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* revision #12 in Table B-1: MSRs in the Pentium 4 and
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* Intel Xeon Processors, on page B-4 and B-5.
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* Intel Xeon Processors, on page B-4 and B-5.
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*/
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*/
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- if (c->x86_model < 2)
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+ fsb_code = (msr_lo >> 16) & 0x7;
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+ switch (fsb_code) {
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+ case 0:
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fsb = 100 * 1000;
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fsb = 100 * 1000;
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- else {
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- u8 fsb_code = (msr_lo >> 16) & 0x7;
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- switch (fsb_code) {
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- case 0:
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- fsb = 100 * 1000;
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- break;
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- case 1:
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- fsb = 13333 * 10;
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- break;
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- case 2:
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- fsb = 200 * 1000;
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- break;
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- }
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+ break;
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+ case 1:
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+ fsb = 13333 * 10;
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+ break;
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+ case 2:
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+ fsb = 200 * 1000;
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+ break;
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}
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}
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if (!fsb)
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if (!fsb)
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