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@@ -18,6 +18,7 @@
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#include <linux/io.h>
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#include <linux/export.h>
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#include <asm/proc-fns.h>
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+#include <asm/cpuidle.h>
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#include <mach/cpuidle.h>
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#include <mach/ddr2.h>
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@@ -30,12 +31,42 @@ struct davinci_ops {
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u32 flags;
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};
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+/* Actual code that puts the SoC in different idle states */
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+static int davinci_enter_idle(struct cpuidle_device *dev,
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+ struct cpuidle_driver *drv,
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+ int index)
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+{
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+ struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
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+ struct davinci_ops *ops = cpuidle_get_statedata(state_usage);
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+
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+ if (ops && ops->enter)
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+ ops->enter(ops->flags);
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+
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+ index = cpuidle_wrap_enter(dev, drv, index,
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+ arm_cpuidle_simple_enter);
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+
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+ if (ops && ops->exit)
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+ ops->exit(ops->flags);
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+
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+ return index;
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+}
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+
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/* fields in davinci_ops.flags */
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#define DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN BIT(0)
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static struct cpuidle_driver davinci_idle_driver = {
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- .name = "cpuidle-davinci",
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- .owner = THIS_MODULE,
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+ .name = "cpuidle-davinci",
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+ .owner = THIS_MODULE,
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+ .states[0] = ARM_CPUIDLE_WFI_STATE,
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+ .states[1] = {
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+ .enter = davinci_enter_idle,
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+ .exit_latency = 10,
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+ .target_residency = 100000,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .name = "DDR SR",
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+ .desc = "WFI and DDR Self Refresh",
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+ },
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+ .state_count = DAVINCI_CPUIDLE_MAX_STATES,
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};
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static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
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@@ -77,41 +108,10 @@ static struct davinci_ops davinci_states[DAVINCI_CPUIDLE_MAX_STATES] = {
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},
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};
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-/* Actual code that puts the SoC in different idle states */
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-static int davinci_enter_idle(struct cpuidle_device *dev,
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- struct cpuidle_driver *drv,
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- int index)
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-{
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- struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
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- struct davinci_ops *ops = cpuidle_get_statedata(state_usage);
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- struct timeval before, after;
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- int idle_time;
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-
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- local_irq_disable();
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- do_gettimeofday(&before);
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-
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- if (ops && ops->enter)
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- ops->enter(ops->flags);
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- /* Wait for interrupt state */
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- cpu_do_idle();
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- if (ops && ops->exit)
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- ops->exit(ops->flags);
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-
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- do_gettimeofday(&after);
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- local_irq_enable();
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- idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
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- (after.tv_usec - before.tv_usec);
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-
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- dev->last_residency = idle_time;
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-
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- return index;
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-}
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-
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static int __init davinci_cpuidle_probe(struct platform_device *pdev)
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{
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int ret;
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struct cpuidle_device *device;
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- struct cpuidle_driver *driver = &davinci_idle_driver;
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struct davinci_cpuidle_config *pdata = pdev->dev.platform_data;
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device = &per_cpu(davinci_cpuidle_device, smp_processor_id());
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@@ -123,27 +123,11 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev)
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ddr2_reg_base = pdata->ddr2_ctlr_base;
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- /* Wait for interrupt state */
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- driver->states[0].enter = davinci_enter_idle;
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- driver->states[0].exit_latency = 1;
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- driver->states[0].target_residency = 10000;
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- driver->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
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- strcpy(driver->states[0].name, "WFI");
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- strcpy(driver->states[0].desc, "Wait for interrupt");
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-
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- /* Wait for interrupt and DDR self refresh state */
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- driver->states[1].enter = davinci_enter_idle;
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- driver->states[1].exit_latency = 10;
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- driver->states[1].target_residency = 10000;
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- driver->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
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- strcpy(driver->states[1].name, "DDR SR");
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- strcpy(driver->states[1].desc, "WFI and DDR Self Refresh");
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if (pdata->ddr2_pdown)
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davinci_states[1].flags |= DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN;
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cpuidle_set_statedata(&device->states_usage[1], &davinci_states[1]);
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device->state_count = DAVINCI_CPUIDLE_MAX_STATES;
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- driver->state_count = DAVINCI_CPUIDLE_MAX_STATES;
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ret = cpuidle_register_driver(&davinci_idle_driver);
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if (ret) {
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